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公开(公告)号：US11226815B2
公开(公告)日：2022-01-18
申请号：US16842191
申请日：2020-04-07
Applicant: International Business Machines Corporation
Inventor： Andrew C. M. Hicks , Michael E. Gildein , Daniel Nicolas Gisolfi
Abstract: A method of analyzing code is provided. The method includes generating an abstract representation of the code, identifying conditional statements in the abstract representation, populating a truth table for each conditional statement that has been identified with all possible outcomes of the conditional statement and assessing the truth table for each conditional statement to identify issues.
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公开(公告)号：US20180203766A1
公开(公告)日：2018-07-19
申请号：US15922067
申请日：2018-03-15
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Bryan P. Davidson , Michael E. Gildein , Angelo M. Quadara
CPC classification number: G06F11/1415 , G06F3/0617 , G06F3/0632 , G06F3/0664 , G06F3/0673 , G06F11/0712 , G06F11/0778 , G06F11/1438 , G06F2201/86
Abstract: Techniques for parallel data collection and recovery for a failing virtual processing system are disclosed. According to aspects of the present disclosure, an example method includes: detecting that the virtual processing system experiences an irreparable error; saving, by each of a plurality of processors of the physical processing system, a corresponding context and data stored in an allocated portion of a memory of the physical processing system to a data store; selecting one of the plurality of processors as a recovery processor; initializing, by the recovery processor, a pre-determined reserved portion of the memory; initiating, by the recovery processor, a new instance of the virtual processing system on the reserved portion of the memory while each remaining processor of the plurality of processors continues the saving; and dynamically adding each remaining processor of the plurality of processors to the new instance of the virtual processing system.
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公开(公告)号：US09918255B2
公开(公告)日：2018-03-13
申请号：US14860868
申请日：2015-09-22
Applicant: International Business Machines Corporation
Inventor： James P. Gilchrist , Michael E. Gildein , Rajaram B. Krishnamurthy , Daniel Rogers , Moses J. Vaughan
CPC classification number: H04W36/0027 , H04B1/38 , H04M1/0256 , H04W36/06 , H04W36/30 , H04W36/36 , H04W48/18 , H04W88/06
Abstract: A modular electronic device including a master core and a plurality of communication radio modules is provided. The modular electronic device maximizes communication performance by receiving a request for network operations from a mobile operating system of the modular electronic device; polling a table to determine a capacity of each communication radio module; and assigning the network operations to a module of the communication radio modules with a highest available capacity to maximize the communication performance of the modular electronic device.
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公开(公告)号：US20170351576A1
公开(公告)日：2017-12-07
申请号：US15174129
申请日：2016-06-06
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Bryan P. Davidson , Michael E. Gildein , Angelo M. Quadara
CPC classification number: G06F11/1415 , G06F3/0617 , G06F3/0632 , G06F3/0664 , G06F3/0673 , G06F11/0712 , G06F11/0778 , G06F11/1438 , G06F2201/86
Abstract: Techniques for parallel data collection and recovery for a failing virtual processing system are disclosed. According to aspects of the present disclosure, an example method includes: detecting that the virtual processing system experiences an irreparable error; saving, by each of a plurality of processors of the physical processing system, a corresponding context and data stored in an allocated portion of a memory of the physical processing system to a data store; selecting one of the plurality of processors as a recovery processor; initializing, by the recovery processor, a pre-determined reserved portion of the memory; initiating, by the recovery processor, a new instance of the virtual processing system on the reserved portion of the memory while each remaining processor of the plurality of processors continues the saving; and dynamically adding each remaining processor of the plurality of processors to the new instance of the virtual processing system.
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公开(公告)号：US20170086105A1
公开(公告)日：2017-03-23
申请号：US14860868
申请日：2015-09-22
Applicant: International Business Machines Corporation
Inventor： James P. Gilchrist , Michael E. Gildein , Rajaram B. Krishnamurthy , Daniel Rogers , Moses J. Vaughan
CPC classification number: H04W36/0027 , H04B1/38 , H04M1/0256 , H04W36/06 , H04W36/30 , H04W36/36 , H04W48/18 , H04W88/06
Abstract: A modular electronic device including a master core and a plurality of communication radio modules is provided. The modular electronic device maximizes communication performance by receiving a request for network operations from a mobile operating system of the modular electronic device; polling a table to determine a capacity of each communication radio module; and assigning the network operations to a module of the communication radio modules with a highest available capacity to maximize the communication performance of the modular electronic device.
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Patent Agency Ranking
公开(公告)号：US11656869B2
公开(公告)日：2023-05-23
申请号：US17526760
申请日：2021-11-15
Applicant: International Business Machines Corporation
Inventor： Andrew C. M. Hicks , Michael E. Gildein , Daniel Nicolas Gisolfi
CPC classification number: G06F8/75 , G06F9/44589
Abstract: A method of analyzing code is provided. The method includes generating an abstract representation of the code, identifying conditional statements in the abstract representation, populating a truth table for each conditional statement that has been identified with all possible outcomes of the conditional statement and assessing the truth table for each conditional statement to identify issues.
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公开(公告)号：US20220188083A1
公开(公告)日：2022-06-16
申请号：US17117650
申请日：2020-12-10
Applicant: International Business Machines Corporation
Abstract: Techniques for vector-based identification of software dependency relationships are described herein. An aspect includes determining a first dependency relationship value between a first code segment and a second code segment. Another aspect includes calculating a magnitude vector based on the first dependency relationship value and a second dependency relationship value corresponding to the first code segment and the second code segment. Another aspect includes determining a relationship score for the first code segment and the second code segment based on the magnitude vector and the first dependency relationship value
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公开(公告)号：US11182282B2
公开(公告)日：2021-11-23
申请号：US16804164
申请日：2020-02-28
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Andrew C. M. Hicks , Ryan Thomas Rawlins , Deborah A. Furman , Michael E. Gildein
Abstract: A method for detecting and localizing a fault in a system under test (SUT) includes generating an initial set of test vectors that provides complete n-wise coverage of the reduced test space. The method further includes generating and executing an initial set of test cases to obtain a first set of execution results. The method further includes determining, based at least in part on the first set of execution results, that one or more test cases failed execution. The method further includes generating a set of new test cases from a selected failing test case. The method further includes executing the set of new test cases to obtain a second set of execution results. The method further includes detecting and localizing the fault based at least in part on the second set of execution results.
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公开(公告)号：US20210117304A1
公开(公告)日：2021-04-22
申请号：US16658187
申请日：2019-10-21
Applicant: International Business Machines Corporation
Inventor： Nicholas Marion , Deborah A. Furman , Michael E. Gildein , Anthony Thomas Sofia
Abstract: Aspects of the invention include receiving, by a processor, source code for a software program. A static analysis of the source code is performed by the processor based at least in part on one or more breakpoint generation rules. Breakpoints are inserted, by the processor, into the source code based at least in part on the static analysis and the one or more breakpoint generation rules. The source code with the inserted breakpoints is compiled, by the processor, into object code for the software program.
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公开(公告)号：US10277721B2
公开(公告)日：2019-04-30
申请号：US14857905
申请日：2015-09-18
Applicant: International Business Machines Corporation
Inventor： James P. Gilchrist , Michael E. Gildein , Rajaram B. Krishnamurthy , Moses J. Vaughan
IPC: H04M1/02
Abstract: A puzzle-style modular electronic device is provided. The puzzle-style modular electronic device is activated based on detecting an interconnection of a plurality of block modules and determining whether the interconnection of the plurality of block modules matches an assembly orientation. Note that each of the plurality of block modules includes a processor, a memory, and at least one connection point through which the interconnection is established and that the interconnection of the plurality of block modules collectively forms the modular electronic device. Further, the puzzle-style modular electronic device authenticates a set of operations of the modular electronic device in response to the determining that the interconnection of the plurality of block modules matches the assembly orientation.
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