公开(公告)号：US20230197779A1

公开(公告)日：2023-06-22

申请号：US17556602

申请日：2021-12-20

Applicant: Intel Corporation

Inventor： Marni NABORS ,  Mauro J. KOBRINSKY ,  Conor P. PULS ,  Kevin FISCHER ,  Curtis TSAI

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L23/48

CPC classification number: H01L29/0673 ,  H01L29/42392 ,  H01L29/78618 ,  H01L29/78696 ,  H01L23/481

Abstract: Integrated circuit structures having backside power delivery are described. In an example, an integrated circuit structure includes a device layer within a cell boundary, the device layer having a front side and a backside, and the device layer including a source or drain structure. A source or drain trench contact structure is on the front side of the device layer. The source or drain trench contact structure is coupled to the source or drain structure. A metal layer is on the backside of the device layer. A via structure couples the metal layer to the source or drain trench contact structure. The via structure is overlapping and parallel with a cell row boundary of the cell boundary.