公开(公告)号：US10943966B2

公开(公告)日：2021-03-09

申请号：US16593069

申请日：2019-10-04

Applicant: Japan Display Inc.

Inventor： Tetsuo Morita ,  Hiroyuki Kimura ,  Makoto Shibusawa ,  Hiroshi Tabatake ,  Yasuhiro Ogawa

IPC: H01L27/32 ,  H01L27/12 ,  H01L29/417 ,  H01L29/786

Abstract: Provided is a display device including a plurality of pixels at least one of which has a first transistor and a light-emitting element. The first transistor includes a gate electrode, a gate insulating film over the gate electrode, an oxide semiconductor film over the gate insulating film, and a first terminal and a second terminal electrically connected to the semiconductor film. The second terminal is electrically connected to the light-emitting element. A region in which the first terminal overlaps with the gate electrode can be smaller than a region in which the second terminal overlaps with the gate electrode.

公开(公告)号：US10319297B2

公开(公告)日：2019-06-11

申请号：US15670241

申请日：2017-08-07

Applicant: Japan Display Inc.

Inventor： Tetsuo Morita ,  Hiroyuki Kimura ,  Makoto Shibusawa ,  Hiroshi Tabatake ,  Yasuhiro Ogawa

IPC: H01L27/32 ,  H01L29/786 ,  H01L51/50 ,  G09G3/3233 ,  G02F1/1345 ,  H01L27/12 ,  G02F1/1362

Abstract: Disclosed is a display device including: a driving transistor, a first switching transistor, and a pixel transistor each having a gate and a pair of terminals; a storage capacitor having a pair of terminals; and a light-emitting element having an input terminal and an output terminal. One terminal of the driving transistor is electrically connected to one terminal of the pixel transistor. The other terminal of the driving transistor is electrically connected to one terminal of the first switching transistor and the input terminal of the light-emitting element. The other terminal of the first switching transistor is electrically connected to the gate of the driving transistor and one terminal of the capacitor. The one terminal of the capacitor overlaps with an active region of the driving transistor.

公开(公告)号：US09542890B2

公开(公告)日：2017-01-10

申请号：US14554614

申请日：2014-11-26

Applicant: Japan Display Inc.

Inventor： Hiroshi Nakayama ,  Tetsuo Morita ,  Hiroyuki Kimura ,  Makoto Shibusawa

IPC: G09G3/30 ,  G09G3/32

CPC classification number: G09G3/3266 ,  G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/066 ,  G09G2320/0233

Abstract: According to one embodiment, a display device includes a plurality of pixel units which each includes a light-emitting element and a pixel circuit, a plurality of first scan lines and second scan lines, a plurality of video signal lines, a controller which controls a scan line drive circuit and a signal line drive circuit, wherein the pixel circuit comprises an output switch, a drive transistor, a capacitance, and a pixel switch, wherein the controller controls a reset operation, a cancellation operation, a correction operation, and a light-emitting operation, and the controller deforms a waveform of a control signal which is supplied from the second scan line in a manner that a time of transitioning the pixel switch from an on-state to an off-state is longer than the time of transitioning by a non-deformed control signal, when writing the video voltage signal in the correction operation.

Abstract translation: 根据一个实施例，显示装置包括多个像素单元，每个像素单元包括发光元件和像素电路，多个第一扫描线和第二扫描线，多个视频信号线，控制器 扫描线驱动电路和信号线驱动电路，其中所述像素电路包括输出开关，驱动晶体管，电容和像素开关，其中所述控制器控制复位操作，取消操作，校正操作和 发光操作，并且控制器使从第二扫描线提供的控制信号的波形以使得像素开关从导通状态转换到截止状态的时间长于时间 当在校正操作中写入视频电压信号时，通过非变形控制信号转换。

公开(公告)号：US12236876B2

公开(公告)日：2025-02-25

申请号：US18500178

申请日：2023-11-02

Applicant: Japan Display Inc.

Inventor： Tetsuo Morita

IPC: G09G3/20 ,  G09G3/3233

Abstract: A display device includes a first transistor controlled using a second control signal obtained by shifting a first control signal and electrically connected between an image data signal line and a first node, a second transistor electrically connected between the first node and a second node, a third transistor controlled using the first control signal and electrically connected between the second node and a gate electrode of the second transistor, a fourth transistor controlled using a fourth control signal obtained by shifting a third control signal and electrically connected between a driving power supply line and the second node, a fifth transistor controlled using the third control signal and electrically connected to the first node, a sixth transistor controlled using the third control signal and electrically connected to a light emitting element and a first electrode of the fifth transistor, and the light emitting element connected to the first electrode.

公开(公告)号：US12159575B2

公开(公告)日：2024-12-03

申请号：US18480528

申请日：2023-10-04

Applicant: Japan Display Inc.

Inventor： Kenji Harada ,  Tetsuo Morita

IPC: G09G3/3225

Abstract: According to one embodiment, a display device includes a pixel circuit provided in each of a plurality of pixels, a plurality of flip-flop circuits provided in a shift register and a reset element provided in each of the flip-flop circuits, and the reset element is an n-channel type transistor, the pixel circuit includes a light emitting element, a light emitting power supply and a switch element, and the light emitting element is disconnected from the light emitting power supply while the light emitting power supply is rising.

公开(公告)号：US11688337B2

公开(公告)日：2023-06-27

申请号：US17696941

申请日：2022-03-17

Applicant: Japan Display Inc.

Inventor： Kenji Harada ,  Tetsuo Morita

IPC: G09G3/3208

CPC classification number: G09G3/3208 ,  G09G2300/0452 ,  G09G2300/0842 ,  G09G2310/08

Abstract: A bootstrap circuit includes a first transistor including a gate electrode, a first and a second electrodes, a capacitor connected between the gate electrode and the second electrode, and a second transistor connected to the gate electrode. In a first period, the second transistor is turned on and the gate electrode is supplied with a first analog voltage, the first transistor is turned on, and the second electrode is supplied with a precharge voltage smaller than the first analog voltage from the first electrode. In a second period, the second transistor is turned off, the first electrode is supplied with a second analog voltage, the capacitor supplies a third analog voltage to the gate electrode in response to the first analog voltage and the second analog voltage, and the second electrode is supplied with the second analog voltage from the first electrode.

公开(公告)号：US11410595B2

公开(公告)日：2022-08-09

申请号：US17109242

申请日：2020-12-02

Applicant: Japan Display Inc.

Inventor： Tetsuo Morita ,  Yasuhiro Ogawa

IPC: G09G3/32 ,  H01L25/075 ,  G09G3/20 ,  G09G3/3233

Abstract: According to one embodiment, a display device includes a display area and a driver. Each of pixels includes a light emitting element and a drive transistor connected in series. An image signal includes a first luminance data and a second luminance data. The first luminance data is based on an average value of a gradation value of pixels, and is common among the pixels included in said one area. The second luminance data is, based on a difference between the gradation value and the average value, an independent luminance data of each of the pixels. The driver controls a common luminance time of the pixels based on the first luminance data, and controls a current value to be supplied to the luminance element of each of the pixels based on the second luminance data.

公开(公告)号：US20210159297A1

公开(公告)日：2021-05-27

申请号：US17165143

申请日：2021-02-02

Applicant: Japan Display Inc.

Inventor： Tetsuo Morita ,  Hiroyuki Kimura ,  Makoto Shibusawa ,  Hiroshi Tabatake ,  Yasuhiro Ogawa

IPC: H01L27/32 ,  H01L27/12 ,  H01L29/417 ,  H01L29/786

Abstract: Provided is a display device including a plurality of pixels at least one of which has a first transistor and a light-emitting element. The first transistor includes a gate electrode, a gate insulating film over the gate electrode, an oxide semiconductor film over the gate insulating film, and a first terminal and a second terminal electrically connected to the semiconductor film. The second terminal is electrically connected to the light-emitting element. A region in which the first terminal overlaps with the gate electrode can be smaller than a region in which the second terminal overlaps with the gate electrode.

公开(公告)号：US10984726B2

公开(公告)日：2021-04-20

申请号：US16846855

申请日：2020-04-13

Applicant: Japan Display Inc.

Inventor： Tetsuo Morita ,  Hiroyuki Kimura

IPC: G09G3/3266

Abstract: A plurality of enable circuits are respectively adjacent to a display area in a first direction and connected to a plurality of control lines to output a control signal corresponding to a pulse signal. A plurality of unit circuits include a first group of unit circuits located adjacent to the display area in the first direction, and a second group of unit circuits located adjacent to the display area in a second direction. The plurality of connection lines include a first group of connection lines connected to the first group of unit circuits, and a second group of connection lines connected to the second group of unit circuits. The connection lines of the second group are longer than the connection lines of the first group.

公开(公告)号：US10546526B2

公开(公告)日：2020-01-28

申请号：US15633960

申请日：2017-06-27

Applicant: Japan Display Inc.

Inventor： Tetsuo Morita ,  Hiroyuki Kimura ,  Makoto Shibusawa ,  Hiroshi Tabatake ,  Yasuhiro Ogawa

IPC: G09G3/3225 ,  H01L27/32 ,  H01L27/12 ,  H01L29/786

Abstract: A display device includes a pixel region having a plurality of pixel and a driver circuit outside the pixel region. The pixels have a driving transistor and a switching transistor having a gate and a pair of terminals, a light-emitting element having an input terminal, and a storage capacitor having a pair of terminals. One terminal of the switching transistor is electrically connected to the gate of the driving transistor and one terminal of the storage capacitor. One terminal of the driving transistor is electrically connected to the other terminal of the storage capacitor and the input terminal. The driver circuit includes first and second transistors having a gate and a pair of terminal. The other terminal of the switching transistor is electrically connected to one terminal of the first transistor and one terminal of the second transistor. The second transistor has a channel region including an oxide semiconductor.