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公开(公告)号：US20180026525A1
公开(公告)日：2018-01-25
申请号：US15653170
申请日：2017-07-18
Applicant: Linear Technology Corporation
Inventor： Andrew J. Gardner
IPC: H03H7/01
CPC classification number: H03H7/427 , H02M1/44 , H03H1/0007 , H03H7/0138 , H04L12/10 , H04L12/40045 , H04L25/0272 , H04L25/0298
Abstract: In a communications system that conducts differential data via a pair of wires, AC common mode noise is undesirably coupled to the wires in a noisy environment. A hybrid common mode choke (HCMC) attenuates the AC common mode noise while passing the differential data to a PHY. The HCMC includes a CMC (windings with the same polarity) and a differential mode choke (windings with opposite polarities). The CMC attenuates the AC common mode noise, and the DMC passes the attenuated AC common mode noise to termination circuitry to eliminate it. Also disclosed is a technique for Kelvin sensing the DC voltage at the pair of wires, in a PoDL system, by detecting the voltage on wires that do not carry DC current, so as to provide a more accurate measurement.
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公开(公告)号：US09851772B2
公开(公告)日：2017-12-26
申请号：US14831632
申请日：2015-08-20
Applicant: Linear Technology Corporation
Inventor： David Dwelley , Andrew J. Gardner
CPC classification number: G06F1/3206 , G06F1/263 , G06F1/3287 , G06F1/3296 , G06F13/4022 , G06F13/4282 , H04L12/10 , H04L12/40045
Abstract: A PoDL system includes a PSE supplying DC power and Ethernet data over a single twisted wire pair to a PD. Prior to coupling the DC voltage source to the wire pair, the PD needs to receive sufficient power to perform a detection and classification routine with the PSE to determine whether the PD is PoDL-compatible. The PSE has a low current, pull-up current source coupled to a first wire in the wire pair via a first inductor. This pull-up current charges a capacitor in the PD to a desired operating voltage, and the operating voltage is used to power a PD logic circuit. The PD logic circuit and a PSE logic circuit then control pull-down transistors to communicate detection and classification data via the first wire. After the handshaking phase, the PSE then applies the DC voltage source across the wire pair to power the PD for normal operation.
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公开(公告)号：US20160156173A1
公开(公告)日：2016-06-02
申请号：US14956308
申请日：2015-12-01
Applicant: Linear Technology Corporation
Inventor： Andrew J. Gardner , Jeffrey L. Heath , David Dwelley
CPC classification number: H02H3/202 , H02H3/06 , H02H3/207 , H02H11/002
Abstract: In one embodiment, a PoDL system includes a PSE that uses high side and low side circuit breakers that uncouple the PSE voltage source from the wire pair in the event that a fault is detected. Faults may include a temporary short to ground, or to a battery voltage, or between the wires. The breakers perform an automatic retry operation in the event the fault has been removed. The voltages on the wires in the wire pair may be monitored to determine whether the voltages are within a normal range or indicative of a fault condition. Other embodiments are disclosed.
Abstract translation: 在一个实施例中，PoDL系统包括使用高侧和低侧断路器的PSE，其在检测到故障的情况下将PSE电压源与电线对分离。 故障可能包括临时短路接地或电池电压，或电线之间。 断路器在故障消除的情况下执行自动重试操作。 可以监测线对中的导线上的电压，以确定电压是在正常范围内还是指示故障状态。 公开了其他实施例。
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公开(公告)号：US20160142217A1
公开(公告)日：2016-05-19
申请号：US14945260
申请日：2015-11-18
Applicant: Linear Technology Corporation
Inventor： Andrew J. Gardner , Jeffrey L. Heath
IPC: H04L12/10
CPC classification number: H04L12/10 , B60L3/0069 , G01R31/024 , H02H3/16 , H04L12/40045 , H04L25/08 , H04L41/0681 , H04L43/0811 , Y04S40/166 , Y04S40/168
Abstract: Circuits and techniques are described for detecting a ground fault leak between the PSE and the PD. Prior to PoDL voltage being applied to the PD, a test switch is temporarily closed for sensing a voltage drop in a loop between the positive terminal of the PSE voltage source and any ground leakage path between the PSE and the PD. If the resistance of the ground leakage path is below a certain threshold, a fault is declared. A similar test may be performed without a test switch by supplying a known test current through the loop and sensing the voltage drop. Another test is to connect the positive terminal of the PSE voltage source to the loop and sense the resulting current. After the full PoDL voltage is applied to the PD, a ground fault may be detected by sensing the equivalence between the source and return PSE currents.
Abstract translation: 描述了用于检测PSE和PD之间的接地故障泄漏的电路和技术。 在PoDL电压施加到PD之前，测试开关暂时闭合，用于感测PSE电压源的正极端子与PSE和PD之间的任何接地泄漏路径之间的环路中的电压降。 如果地面泄漏路径的电阻低于一定阈值，则会声明故障。 可以通过提供已知的测试电流通过环路并感测电压降而不用测试开关进行类似的测试。 另一个测试是将PSE电压源的正极连接到环路并感测所得到的电流。 在将完整的PoDL电压施加到PD之后，可以通过感测源极和返回PSE电流之间的等效性来检测接地故障。
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公开(公告)号：US20150295735A1
公开(公告)日：2015-10-15
申请号：US14681529
申请日：2015-04-08
Applicant: Linear Technology Corporation
Inventor： Andrew J. Gardner
CPC classification number: H04L25/0274 , G06F13/4072 , H02H9/008 , H04L12/10 , H04L12/40045 , H04L25/0266
Abstract: A Power Over Data Lines (PoDL) system includes Power Sourcing Equipment (PSE) supplying DC power and Ethernet data over a single twisted wire pair to a Powered Device (PD). The PSE supplies the DC current and AC data through a cascaded coupling network including a series of AC-blocking inductor stages having different inductances to substantially filter out the AC component and pass the DC component. The data is supplied to the wires via capacitors. The PD may have a matched decoupling network for providing the separated DC power and data to a PD load.
Abstract translation: 数据线上电（PoDL）系统包括通过单个双绞线将DC电源和以太网数据提供给有源设备（PD）的电源设备（PSE）。 PSE通过级联耦合网络提供直流电流和交流数据，包括具有不同电感的一系列交流阻塞电感级，以实质上滤除交流分量并通过直流分量。 数据通过电容器提供给导线。 PD可以具有匹配的去耦网络，用于将分离的DC功率和数据提供给PD负载。
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Patent Agency Ranking
公开(公告)号：US10382005B2
公开(公告)日：2019-08-13
申请号：US15653170
申请日：2017-07-18
Applicant: Linear Technology Corporation
Inventor： Andrew J. Gardner
Abstract: In a communications system that conducts differential data via a pair of wires, AC common mode noise is undesirably coupled to the wires in a noisy environment. A hybrid common mode choke (HCMC) attenuates the AC common mode noise while passing the differential data to a PHY. The HCMC includes a CMC (windings with the same polarity) and a differential mode choke (windings with opposite polarities). The CMC attenuates the AC common mode noise, and the DMC passes the attenuated AC common mode noise to termination circuitry to eliminate it. Also disclosed is a technique for Kelvin sensing the DC voltage at the pair of wires, in a PoDL system, by detecting the voltage on wires that do not carry DC current, so as to provide a more accurate measurement.
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公开(公告)号：US10090666B2
公开(公告)日：2018-10-02
申请号：US14956308
申请日：2015-12-01
Applicant: Linear Technology Corporation
Inventor： Andrew J. Gardner , Jeffrey L. Heath , David Dwelley
Abstract: In one embodiment, a PoDL system includes a PSE that uses high side and low side circuit breakers that uncouple the PSE voltage source from the wire pair in the event that a fault is detected. Faults may include a temporary short to ground, or to a battery voltage, or between the wires. The breakers perform an automatic retry operation in the event the fault has been removed. The voltages on the wires in the wire pair may be monitored to determine whether the voltages are within a normal range or indicative of a fault condition. Other embodiments are disclosed.
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公开(公告)号：US09780974B2
公开(公告)日：2017-10-03
申请号：US14681529
申请日：2015-04-08
Applicant: Linear Technology Corporation
Inventor： Andrew J. Gardner
CPC classification number: H04L25/0274 , G06F13/4072 , H02H9/008 , H04L12/10 , H04L12/40045 , H04L25/0266
Abstract: A Power Over Data Lines (PoDL) system includes Power Sourcing Equipment (PSE) supplying DC power and Ethernet data over a single twisted wire pair to a Powered Device (PD). The PSE supplies the DC current and AC data through a cascaded coupling network including a series of AC-blocking inductor stages having different inductances to substantially filter out the AC component and pass the DC component. The data is supplied to the wires via capacitors. The PD may have a matched decoupling network for providing the separated DC power and data to a PD load.
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公开(公告)号：US10313139B2
公开(公告)日：2019-06-04
申请号：US15479187
申请日：2017-04-04
Applicant: Linear Technology Corporation
Inventor： David M. Dwelley , Andrew J. Gardner
IPC: H04L12/437 , H04L12/10 , H04L12/24 , G06F1/26 , H04B3/44 , H04L12/40 , H04L12/403 , H04L12/44
Abstract: In one embodiment, a master device has a first port and a second port and initially applies a DC voltage only to the first port. A plurality of slave devices, each have a third port and a fourth port, are serially connected to the master device in a ring, via conductors, starting at the first port and ending at the second port. The conductors simultaneously carry the DC voltage and differential data. Each slave device, after performing a detection routine, then sequentially applies the DC voltage to the adjacent downstream slave device in a first direction around the ring. If the master does not detect the presence of the DC voltage at its second port, the master device applies the DC voltage to both the first port and the second port to sequentially power up the slave devices in both directions around the ring of slave devices.
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公开(公告)号：US09853838B2
公开(公告)日：2017-12-26
申请号：US14712855
申请日：2015-05-14
Applicant: Linear Technology Corporation
Inventor： Andrew J. Gardner , David Dwelley , Jeffrey L. Heath
CPC classification number: H04L25/0266 , H02M3/156 , H02M3/158 , H02M2001/0029 , H04L12/10 , H04L25/0272
Abstract: A Power Over Data Lines (PoDL) system includes Power Sourcing Equipment (PSE) supplying DC power and differential Ethernet data over a single twisted wire pair to a Powered Device (PD). Due to start-up perturbations, PD load current variations, and other causes, dV/dt noise is introduced in the power signal. Such noise may be misinterpreted as data unless mitigated somehow. Rather than increasing the values of the passive filtering components conventionally used for decoupling/coupling the power and data from/to the wire pair, active circuitry is provided in the PSE, PD, or both to limit dV/dt in the power signal. Such circuitry may be implemented on the same chip as the PSE controller or PD controller. Therefore, the sizes of the passive components in the decoupling/coupling networks may be reduced.
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