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公开(公告)号:US20220173490A1
公开(公告)日:2022-06-02
申请号:US17106269
申请日:2020-11-30
Applicant: NXP B.V
Inventor: Adrianus Buijsman , Abdellatif Zanati , Giorgio Carluccio
Abstract: A method of manufacturing a device is provided. The method includes forming a first cavity in a first substrate with the first cavity having a first depth. A second cavity is formed in a second substrate with the second cavity having a second depth. The first cavity and the second cavity are aligned with each other. The first substrate is affixed to the second substrate to form a waveguide substrate having a hollow waveguide with a first dimension substantially equal to the first depth plus the second depth. A conductive layer is formed on the sidewalls of the hollow waveguide. The waveguide substrate is placed over a packaged semiconductor device, the hollow waveguide aligned with a launcher of the packaged semiconductor device.
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12.
公开(公告)号:US20210075081A1
公开(公告)日:2021-03-11
申请号:US16563292
申请日:2019-09-06
Applicant: NXP B.V.
Inventor: Antonius Hendrikus Jozef Kamphuis , Antonius Johannes Matheus de Graauw , Adrianus Buijsman , Michael B. Vincent
Abstract: A mechanism is provided to reduce a distance of a waveguide antenna from transmit and receive circuitry in an integrated circuit device die. This distance reduction is performed by providing vertical access to radio frequency connections on a top surface of the IC device die. A cavity in the encapsulant of the package can be formed to provide access to the connections and plated to perform a shielding function. A continuous connection from the RF pads is used as a vertical interconnect. The region around the vertical interconnect can be filled with encapsulant potting material and back grinded to form a surface of the semiconductor device package. A waveguide antenna feed can be plated or printed on the vertical interconnect on the surface of the package.
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