公开(公告)号：US10957236B2

公开(公告)日：2021-03-23

申请号：US16395247

申请日：2019-04-26

Applicant: NOVATEK Microelectronics Corp.

Inventor： Yen-Tao Liao ,  Hung-Hsiang Chen ,  Jen-Ta Yang ,  Yi-Wei Lin ,  Huang-Chin Tang

IPC: G09G3/20

Abstract: The present invention discloses a driving method for a source driver, for driving a source line of a display panel. The driving method includes the steps of: driving the source line with a first voltage or a second voltage smaller than the first voltage in a first driving cycle; driving the source line with the first voltage in a second driving cycle next to the first driving cycle when the source line is driven with the first voltage in the first driving cycle; and driving the source line with an overdrive voltage in the second driving cycle when the source line is driven with the second voltage in the first driving cycle. The first voltage is a normal high voltage of the display panel, and the overdrive voltage is greater than the normal high voltage.

公开(公告)号：US10943531B1

公开(公告)日：2021-03-09

申请号：US16891081

申请日：2020-06-03

Applicant: NOVATEK Microelectronics Corp.

Inventor： Li-Chieh Chen ,  Yen-Tao Liao

IPC: G09G3/3208

Abstract: The present invention provides a decay factor accumulation method for an organic light-emitting diode (OLED) display panel with a variable refresh rate (VRR). The decay factor accumulation method includes detecting an operating frame rate of an input image; generating a decay factor compensation coefficient according to the operating frame rate and a measurement frame rate; and generating a plurality of accumulated decay factors of the input image according to a decay factor lookup table corresponding to the measurement frame rate and the decay factor compensation coefficient.

公开(公告)号：US10909937B1

公开(公告)日：2021-02-02

申请号：US16686222

申请日：2019-11-18

Applicant: NOVATEK Microelectronics Corp.

Inventor： Hsien-Po Huang ,  Yen-Tao Liao ,  Hongchun Cong

IPC: G09G3/36 ,  G09G5/10 ,  G02F1/1362

Abstract: A driver circuit is coupled to a dual cell panel having a first cell and a second cell superposed on each other. The driver circuit includes a second cell processor and a first cell processor. The second cell processor is configured to generate a gray scale data for the second cell. The first cell processor includes a pixel data compensation circuit and a white tracking compensation circuit. The pixel data compensation circuit is configured to compensate an image data for the first cell according to a brightness of the image data. The white tracking compensation circuit is configured to compensate the image data for the first cell according to a color temperature of the gray scale data.

公开(公告)号：US12283236B2

公开(公告)日：2025-04-22

申请号：US18311902

申请日：2023-05-04

Applicant: NOVATEK Microelectronics Corp.

Inventor： Ching-Hua Liu ,  Yen-Tao Liao

IPC: G09G3/3208 ,  G06F3/14 ,  G06T5/70

Abstract: A processor is disposed in a display device and is configured to perform following operations: calculating a total coupling coefficient for a (N−1)th frame according to input data, in which N is a positive integer greater than 1; calculating a coupling coefficient difference value of two adjacent lines for a Nth frame according to the input data; generating a first compensation value for a target sub-pixel according to the coupling coefficient difference value and target input data of the target sub-pixel; generating a second compensation value for the target sub-pixel according to the first compensation value and the total coupling coefficient; generating an output data for the target sub-pixel according to the target input data and the second compensation value; and controlling a display panel in the display device to display a final image according to the output data.

公开(公告)号：US20240339064A1

公开(公告)日：2024-10-10

申请号：US18513622

申请日：2023-11-19

Applicant: Novatek Microelectronics Corp.

Inventor： Chan-Yi Lin ,  Yen-Tao Liao

IPC: G09G3/20

CPC classification number: G09G3/2074 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2320/0242 ,  G09G2320/041

Abstract: The invention provides a display device and a grayscale compensation method thereof. The display device includes a data conversion circuit, a voltage drop estimation circuit, and a compensation circuit. The data conversion circuit converts a plurality of original grayscale data of a target pixel block into current data. The voltage drop estimation circuit converts the current data into transmission line voltage drop information of the target pixel block. The compensation circuit converts the transmission line voltage drop information into at least one pixel compensation value of the target pixel block and compensates the original grayscale data of the target pixel block using the at least one pixel compensation value to generate a plurality of compensated grayscale data of the target pixel block.

公开(公告)号：US11942037B1

公开(公告)日：2024-03-26

申请号：US18318645

申请日：2023-05-16

Applicant: Novatek Microelectronics Corp.

Inventor： Zi-Yi Lian ,  Yen-Tao Liao

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2320/0247 ,  G09G2340/0435

Abstract: An organic light emitting diode (OLED) display control circuit and a control method thereof are provided. The OLED control circuit includes a counting unit, a judgment unit, a remainder calculation unit and a signal compensation unit. The counting unit counts display lines of a current frame according to a vertical synchronization signal to generate a first count value. The judgment unit compares the first count value and a second count value to generate a judgment result. The second count value represents the number of display lines of a previous frame preceding to the current frame. The remainder calculation unit calculates a remainder generated by dividing the first count value by a period of an emission control signal. The signal compensation unit adjusts the emission control signal to compensate for an incomplete period of the emission control signal occurring in the end of the current frame period.

公开(公告)号：US11862065B2

公开(公告)日：2024-01-02

申请号：US17692190

申请日：2022-03-11

Applicant: Novatek Microelectronics Corp.

Inventor： Grace Li ,  Jen-Ta Yang ,  Yen-Tao Liao ,  Yu-Hung Su

IPC: G09G3/20

CPC classification number: G09G3/2096 ,  G09G2310/08 ,  G09G2340/0435

Abstract: A timing control device for the display panel includes a control circuit. The control circuit is configured to generate a plurality of gate scanning control signals and a data transmission control signal. In response to that a display refresh rate changes from a first frequency to a second frequency, the control circuit adjusts the plurality of gate scanning control signals to generate a plurality of adjusted gate scanning control signals, or adjusts the data transmission control signal to generate an adjusted data transmission control signal, for driving a display panel under the second frequency as the display refresh rate.

公开(公告)号：US11823637B2

公开(公告)日：2023-11-21

申请号：US17564253

申请日：2021-12-29

Applicant: Novatek Microelectronics Corp.

Inventor： Yi-Tsung Lin ,  Yen-Tao Liao

IPC: G09G3/36

CPC classification number: G09G3/3614 ,  G09G3/3688 ,  G09G2310/08

Abstract: A timing control circuit is provided to control a data voltage outputted to a pixel array of a display panel during a frame period to perform a polarity reversal every N scan lines, where N is a positive integer. The timing control circuit includes a receiver and an adjustment circuit. The receiver is configured to sequentially receive first display data and second display data for one data line of the display panel. The adjustment circuit is coupled to the receiver to adjust at least one of gray information of the second display data and charging time of the second display data according to a voltage polarity of the first display data and a voltage polarity of the second display data. A corresponding operation method of the timing control circuit is also provided.

公开(公告)号：US11741636B2

公开(公告)日：2023-08-29

申请号：US16987410

申请日：2020-08-07

Applicant: Novatek Microelectronics Corp.

Inventor： Hui-Yu Jiang ,  Heng-Yao Lin ,  Yen-Tao Liao

IPC: G06T9/20 ,  G06T5/00 ,  G06T5/50

CPC classification number: G06T9/20 ,  G06T5/002 ,  G06T5/009 ,  G06T5/50 ,  G06T2207/20192

Abstract: An image processing method including the following steps is provided. An image information of an image is received, wherein the image includes a plurality of blocks and the image information includes a plurality of pixel information of each block. A dual gamma correction is performed on a first group of blocks of the image to obtain one or more corrected blocks and the dual gamma correction is skipped on a second group of blocks of the image to obtain a plurality of uncorrected blocks. A first encoding process is performed on the one or more corrected blocks to obtain a plurality of first encoded blocks. A second encoding process different from the first encoding process is performed on the plurality of uncorrected blocks to obtain a plurality of second encoded blocks.

公开(公告)号：US11461888B2

公开(公告)日：2022-10-04

申请号：US16933979

申请日：2020-07-20

Applicant: Novatek Microelectronics Corp.

Inventor： Li-Chieh Chen ,  Yen-Tao Liao

IPC: G06T7/00

Abstract: The disclosure provides a method and an image processor for computing decay factors for display degradation compensation. The method includes the following steps. A sequence of frames including a current frame are received. Whether the current frame is a dynamic frame or a static frame is determined. When the current frame is the dynamic frame, accumulation on decay factors is performed. When the current frame is the static frame, accumulation on the decay factors is not performed.