公开(公告)号：US20170054029A1

公开(公告)日：2017-02-23

申请号：US15231061

申请日：2016-08-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Masami JINTYOU ,  Daisuke KUROSAKI ,  Yukinori SHIMA ,  Toshimitsu OBONAI

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L21/0254 ,  H01L21/02554 ,  H01L21/02557 ,  H01L21/0256 ,  H01L21/02603 ,  H01L21/0262 ,  H01L21/02653 ,  H01L29/66969

Abstract: A method for manufacturing a semiconductor device has a first step including a step of forming an oxide semiconductor film, a second step including a step of forming a gate insulating film over the oxide semiconductor film and a step of forming a gate electrode over the gate insulating film, a third step including a step of forming a nitride insulating film over the oxide semiconductor film and the gate electrode, a fourth step including a step of forming an oxide insulating film over the nitride insulating film, a fifth step including a step of forming an opening in the nitride insulating film and the oxide insulating film, and a sixth step including a step of forming source and drain electrodes over the oxide insulating film so as to cover the opening. In the third step, the nitride insulating film is formed through at least two steps: plasma treatment and deposition treatment. The two steps are each performed at a temperature higher than or equal to 150° C. and lower than 300° C.

Abstract translation: 一种半导体器件的制造方法具有：第一工序，包括形成氧化物半导体膜的工序;第二工序，包括在所述氧化物半导体膜上形成栅极绝缘膜的步骤;以及在所述栅极绝缘上形成栅电极的工序; 薄膜，第三步骤，包括在所述氧化物半导体膜和所述栅电极上形成氮化物绝缘膜的步骤，第四步骤，包括在所述氮化物绝缘膜上形成氧化物绝缘膜的步骤，第五步骤，包括形成步骤 氮化物绝缘膜和氧化物绝缘膜中的开口，以及第六步骤，包括在氧化物绝缘膜上形成源极和漏极以便覆盖开口的步骤。 在第三步骤中，通过至少两个步骤形成氮化物绝缘膜：等离子体处理和沉积处理。 两个步骤各自在高于或等于150℃并低于300℃的温度下进行。

公开(公告)号：US20160260836A1

公开(公告)日：2016-09-08

申请号：US15058330

申请日：2016-03-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kenichi OKAZAKI ,  Junichi KOEZUKA ,  Toshimitsu OBONAI ,  Satoru SAITO ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L29/24 ,  H01L29/34 ,  H01L29/04

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/045 ,  H01L29/24 ,  H01L29/34 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/78693 ,  H01L29/78696

Abstract: A novel oxide semiconductor film. An oxide semiconductor film with a small amount of defects. An oxide semiconductor film in which a peak value of the density of shallow defect states at an interface between the oxide semiconductor film and an insulating film is small. The oxide semiconductor film includes In, M (M is Al, Ga, Y, or Sn), Zn, and a region in which a peak value of a density of shallow defect states is less than 1E13 per square cm per volt.

Abstract translation: 一种新型氧化物半导体膜。 具有少量缺陷的氧化物半导体膜。 在氧化物半导体膜和绝缘膜之间的界面处的浅缺陷状态的密度的峰值小的氧化物半导体膜。 氧化物半导体膜包括In，M（M是Al，Ga，Y或Sn），Zn以及浅缺陷状态的密度的峰值小于1E13 /平方厘米每伏的区域。

公开(公告)号：US20150372023A1

公开(公告)日：2015-12-24

申请号：US14741840

申请日：2015-06-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masami JINTYOU ,  Toshimitsu OBONAI ,  Junichi KOEZUKA ,  Suzunosuke HIRAISHI

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L21/385 ,  H01L21/441 ,  H01L21/47573 ,  H01L27/127 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

Abstract: To suppress change in electric characteristics and improve reliability of a semiconductor device including a transistor formed using an oxide semiconductor. A semiconductor device includes a transistor including a gate electrode, a first insulating film, an oxide semiconductor film, a second insulating film, and a pair of electrodes. The gate electrode and the oxide semiconductor film overlap with each other. The oxide semiconductor film is located between the first insulating film and the second insulating film and in contact with the pair of electrodes. The first insulating film is located between the gate electrode and the oxide semiconductor film. An etching rate of a region of at least one of the first insulating film and the second insulating film is higher than 8 nm/min when etching is performed using a hydrofluoric acid.

Abstract translation: 抑制包括使用氧化物半导体形成的晶体管的半导体器件的电特性变化和提高可靠性。 半导体器件包括晶体管，其包括栅电极，第一绝缘膜，氧化物半导体膜，第二绝缘膜和一对电极。 栅电极和氧化物半导体膜彼此重叠。 氧化物半导体膜位于第一绝缘膜和第二绝缘膜之间并与该对电极接触。 第一绝缘膜位于栅电极和氧化物半导体膜之间。 当使用氢氟酸进行蚀刻时，第一绝缘膜和第二绝缘膜中的至少一个的区域的蚀刻速率高于8nm / min。

公开(公告)号：US20150348998A1

公开(公告)日：2015-12-03

申请号：US14721362

申请日：2015-05-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Masami JINTYOU ,  Daisuke KUROSAKI ,  Yukinori SHIMA ,  Toshimitsu OBONAI

IPC: H01L27/12 ,  H01L21/44

CPC classification number: H01L27/1225 ,  H01L27/1255 ,  H01L29/78648 ,  H01L29/7869

Abstract: Provided is a transistor which includes an oxide semiconductor film in a channel region. A change from a shift value before light irradiation to a shift value under light irradiation is greater than or equal to −1 V and less than or equal to 0.5 V, where the shift value is a gate voltage at a point of intersection of an axis of 1×10−12 A and a steepest tangent line of the logarithm of a drain current in drain current-gate voltage characteristics of the transistor, and where the light irradiation is performed on the oxide semiconductor film with light having an energy greater than or equal to a band gap of the oxide semiconductor film.

Abstract translation: 提供了在沟道区域中包括氧化物半导体膜的晶体管。 在光照射之前的偏移值到光照射下的移动值的变化大于或等于-1V且小于或等于0.5V，其中移位值是轴的交点处的栅极电压 1×10-12A的最大切线和晶体管的漏极电流 - 栅极电压特性中的漏极电流的对数的最快切线，并且其中用氧化物半导体膜对具有能量大于或等于 等于氧化物半导体膜的带隙。

公开(公告)号：US20250008780A1

公开(公告)日：2025-01-02

申请号：US18707700

申请日：2022-11-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masataka NAKADA ,  Masahiro KATAYAMA ,  Rai SATO ,  Yasuharu HOSAKA ,  Toshimitsu OBONAI ,  Masayoshi DOBASHI ,  Koji KUSUNOKI ,  Tomonori NAKAYAMA

IPC: H10K59/122 ,  H10K59/131

Abstract: A display apparatus with high resolution is provided. The display apparatus includes a transistor, a light-emitting device, a first insulating layer, a second insulating layer, and a first conductive layer. The transistor includes a semiconductor layer and a second conductive layer electrically connected to the semiconductor layer. The light-emitting device includes a pixel electrode. The first insulating layer is provided over the transistor and includes a first opening reaching the second conductive layer. The first conductive layer covers the first opening. The second insulating layer is provided over the first insulating layer and includes a second opening in a region overlapping with the first opening. The pixel electrode covers a top surface of the second insulating layer and the second opening. The pixel electrode is electrically connected to the second conductive layer through the first conductive layer. An end portion of the first insulating layer is positioned over the second conductive layer. An end portion of the second insulating layer is positioned over the first conductive layer. An end portion of the second insulating layer is positioned outward from the end portion of the first insulating layer.

公开(公告)号：US20230317856A1

公开(公告)日：2023-10-05

申请号：US18132527

申请日：2023-04-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Yasuharu HOSAKA ,  Toshimitsu OBONAI ,  Yasutaka NAKAZAWA ,  Seiji YASUMOTO ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L27/12 ,  H05B33/22

CPC classification number: H01L29/7869 ,  H01L29/78603 ,  H01L29/78696 ,  H01L27/1225 ,  H05B33/22 ,  H10K50/00

Abstract: A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. A semiconductor device with stable electrical characteristics is provided. A semiconductor device includes a first insulating layer, a second insulating layer, a semiconductor layer, and a first conductive layer. The semiconductor layer, the second insulating layer, and the first conductive layer are stacked in this order over the first insulating layer. The second insulating layer has a stacked-layer structure in which a first insulating film, a second insulating film, and a third insulating film are stacked in this order. The first insulating film, the second insulating film, and the third insulating film each contain an oxide. The first insulating film includes a portion in contact with the semiconductor layer. The semiconductor layer contains indium, gallium, and oxygen and includes a region with an indium content percentage higher than a gallium content percentage.

公开(公告)号：US20200161435A1

公开(公告)日：2020-05-21

申请号：US16739647

申请日：2020-01-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yasuharu Hosaka ,  Toshimitsu OBONAI ,  Yukinori SHIMA ,  Masami JINTYOU ,  Daisuke KUROSAKI ,  Takashi HAMOCHI ,  Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Shunpei YAMAZAKI

IPC: H01L29/24 ,  H01L29/786 ,  C04B35/622 ,  C04B35/453 ,  H01L27/12 ,  H01L29/778 ,  C23C14/58 ,  C23C14/08 ,  C04B35/01 ,  C03C17/245

Abstract: A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.

公开(公告)号：US20180025918A1

公开(公告)日：2018-01-25

申请号：US15654089

申请日：2017-07-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Takashi HAMOCHI ,  Yasuharu HOSAKA ,  Toshimitsu OBONAI

IPC: H01L21/3213 ,  H01L21/18 ,  H01L29/49 ,  H01L29/812 ,  H01L21/28

CPC classification number: H01L21/32137 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02326 ,  H01L21/0234 ,  H01L21/02488 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/18 ,  H01L21/28035 ,  H01L21/2807 ,  H01L21/28079 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696 ,  H01L29/812

Abstract: A transistor with high productivity and a method for manufacturing the transistor are provided. In the formation of a bottom-gate transistor using a metal oxide layer as a semiconductor layer where a channel is formed, a gate insulating layer including silicon nitride is formed, and then plasma treatment is successively performed in the same treatment chamber under an atmosphere containing oxygen. After that, the metal oxide layer is formed.

公开(公告)号：US20180012912A1

公开(公告)日：2018-01-11

申请号：US15697627

申请日：2017-09-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Yukinori SHIMA ,  Masami JINTYOU ,  Takashi HAMOCHI ,  Satoshi HIGANO ,  Yasuharu HOSAKA ,  Toshimitsu OBONAI

IPC: H01L27/12 ,  H01L49/02 ,  H01L29/45 ,  H01L29/786

CPC classification number: H01L27/1255 ,  H01L28/20 ,  H01L28/24 ,  H01L28/60 ,  H01L29/45 ,  H01L29/7869 ,  H01L29/78693

Abstract: A novel semiconductor device in which a metal film containing copper (Cu) is used for a wiring, a signal line, or the like in a transistor including an oxide semiconductor film is provided. The semiconductor device includes an oxide semiconductor film having conductivity on an insulating surface and a conductive film in contact with the oxide semiconductor film having conductivity. The conductive film includes a Cu—X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti).

公开(公告)号：US20170338107A1

公开(公告)日：2017-11-23

申请号：US15596414

申请日：2017-05-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Yasuharu HOSAKA ,  Toshimitsu OBONAI ,  Kenichi OKAZAKI

IPC: H01L21/02 ,  H01L21/28 ,  H01L29/786 ,  H01L29/49 ,  H01L29/423 ,  H01L29/51

CPC classification number: H01L21/02266 ,  C23C14/08 ,  C23C14/086 ,  C23C14/3414 ,  C23C14/54 ,  C23C14/566 ,  C23C14/5806 ,  C23C16/345 ,  H01L21/02142 ,  H01L21/02164 ,  H01L21/02472 ,  H01L21/02483 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02601 ,  H01L21/02631 ,  H01L21/28211 ,  H01L29/4232 ,  H01L29/4908 ,  H01L29/517 ,  H01L29/786

Abstract: A method for manufacturing a novel semiconductor device is provided. The method includes a first step of forming a first oxide semiconductor film over a substrate, a second step of heating the first oxide semiconductor film, and a third step of forming a second oxide semiconductor film over the first oxide semiconductor film. The first to third steps are performed in an atmosphere in which water vapor partial pressure is lower than water vapor partial pressure in atmospheric air, and the first step, the second step, and the third step are successively performed in this order.