公开(公告)号：US20250015184A1

公开(公告)日：2025-01-09

申请号：US18895686

申请日：2024-09-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hagyoul BAE ,  Seunggeol NAM ,  Jinseong HEO ,  Sanghyun JO ,  Dukhyun CHOE

IPC: H01L29/78 ,  H01L21/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/51 ,  H01L29/66 ,  H01L29/786

Abstract: Provided are a ferroelectric semiconductor device and a method of extracting a defect density of the same. A ferroelectric electronic device includes a first layer, an insulating layer including a ferroelectric layer and a first interface that is adjacent to the first layer, and an upper electrode over the insulating layer, wherein the insulating layer has a bulk defect density of 1016 cm−3 eV−1 or more and an interface defect density of 1010 cm−2 eV−1 or more.

公开(公告)号：US20240196623A1

公开(公告)日：2024-06-13

申请号：US18531922

申请日：2023-12-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunseong LEE ,  Jinseong HEO ,  Kihong KIM ,  Dukhyun CHOE ,  Hyunjae LEE ,  Sanghyun JO

IPC: H10B51/20 ,  H01L21/28 ,  H01L29/51 ,  H01L29/66 ,  H01L29/78 ,  H10B53/20

CPC classification number: H10B51/20 ,  H01L29/40111 ,  H01L29/516 ,  H01L29/6684 ,  H01L29/78391 ,  H10B53/20

Abstract: An electronic device may include a conductive material layer, a ferroelectric layer covering the conductive material layer, and an electrode covering the ferroelectric layer. The ferroelectric layer may include a compound represented by HfxAyOz, where 0≤x≤1, 0≤y≤1, and 2(x+y)

公开(公告)号：US20240006509A1

公开(公告)日：2024-01-04

申请号：US18468394

申请日：2023-09-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Taehwan MOON ,  Seunggeol NAM ,  Sanghyun JO

IPC: H01L29/51 ,  H01L29/78 ,  H01L21/28 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786 ,  H10B53/30

CPC classification number: H01L29/516 ,  H01L29/78391 ,  H01L29/40111 ,  H01L28/60 ,  H01L29/0665 ,  H01L29/42392 ,  H01L29/6684 ,  H01L29/7851 ,  H01L29/78696 ,  H10B53/30

Abstract: A thin film structure including ferroelectrics and anti-ferroelectrics and a semiconductor device including the same are provided. The thin film structure includes a first anti-ferroelectric layer comprising anti-ferroelectrics, a second anti-ferroelectric layer disposed apart from the first anti-ferroelectric layer and including anti-ferroelectrics, and a ferroelectric layer between the first anti-ferroelectric layer and the second anti-ferroelectric layer and including ferroelectrics.

公开(公告)号：US20230253498A1

公开(公告)日：2023-08-10

申请号：US18303288

申请日：2023-04-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunseong LEE ,  Jinseong HEO ,  Sangwook KIM ,  Taewan MOON ,  Sanghyun JO

IPC: H01L29/78 ,  H01L29/51 ,  H10B51/30

CPC classification number: H01L29/78391 ,  H01L29/516 ,  H10B51/30 ,  H01L21/02181

Abstract: Provided is a ferroelectric thin-film structure including a semiconductor substrate, a first ferroelectric layer on the semiconductor substrate, and a second ferroelectric layer on the semiconductor substrate. The second ferroelectric layer is spaced apart from the first ferroelectric layer and has a different dielectric constant from the first ferroelectric layer. The first ferroelectric layer and the second ferroelectric layer may be different from each other in terms of the amount of a dopant contained therein, and may exhibit different threshold voltages when applied to transistors.

公开(公告)号：US20230062878A1

公开(公告)日：2023-03-02

申请号：US17894504

申请日：2022-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Yunseong LEE ,  Hyangsook LEE ,  Sanghyun JO ,  Seunggeol NAM ,  Taehwan MOON ,  Hagyoul BAE ,  Eunha LEE ,  Junho LEE

IPC: H01L29/78 ,  H01L29/51

Abstract: An electronic device includes: a substrate including a source, a drain, and a channel between the source and the drain; a gate electrode arranged above the substrate and facing the channel, the gate electrode being apart from the channel in a first direction; and a ferroelectric thin film structure between the channel and the gate electrode, the ferroelectric thin film structure including a first ferroelectric layer, a crystallization barrier layer including a dielectric material, and a second ferroelectric layer, which are sequentially arranged from the channel in the first direction. The average of sizes of crystal grains of the first ferroelectric layer may be less than or equal to the average of sizes of crystal grains of the second ferroelectric layer, and owing to small crystal grains, dispersion of performance may be improved.

公开(公告)号：US20220302267A1

公开(公告)日：2022-09-22

申请号：US17496300

申请日：2021-10-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dukhyun CHOE ,  Jinseong HEO ,  Yunseong LEE ,  Sanghyun JO

IPC: H01L29/40 ,  H01L29/78 ,  H01L29/66 ,  H01L51/05 ,  H01L29/51 ,  H01L29/49

Abstract: Provided are a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a substrate, a channel layer at least one of on or in the substrate, an insulation layer on the substrate, a ferroelectric layer on the insulation layer, a fixed charge layer on an interface between the insulation layer and the ferroelectric layer, the fixed charge layer including charges of a first polarity, and a gate on the ferroelectric layer.

公开(公告)号：US20210091227A1

公开(公告)日：2021-03-25

申请号：US17026665

申请日：2020-09-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Sangwook KIM ,  Yunseong LEE ,  Sanghyun JO

IPC: H01L29/78 ,  H01L21/28 ,  H01L29/66 ,  G11C11/22

Abstract: A domain switching device includes a channel region, a source region and a drain region connected to the channel region, a gate electrode isolated from contact with the channel region, an anti-ferroelectric layer between the channel region and the gate electrode, a conductive layer between the gate electrode and the anti-ferroelectric layer to contact the anti-ferroelectric layer, and a barrier layer between the anti-ferroelectric layer and the channel region.

公开(公告)号：US20210083121A1

公开(公告)日：2021-03-18

申请号：US17001979

申请日：2020-08-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Sangwook KIM ,  Yunseong LEE ,  Sanghyun JO ,  Hyangsook LEE

IPC: H01L29/78 ,  H01L29/51 ,  H01L29/40

Abstract: Provided are an electronic device and a method of manufacturing the same. The electronic device includes a ferroelectric crystallization layer between a substrate and a gate electrode and a crystallization prevention layer between the substrate and the ferroelectric crystallization layer. The ferroelectric crystallization layer is at least partially crystallized and includes a dielectric material having ferroelectricity or anti-ferroelectricity. Also, the crystallization prevention layer prevents crystallization in the ferroelectric crystallization layer from being spread toward the substrate.

公开(公告)号：US20200058741A1

公开(公告)日：2020-02-20

申请号：US16662872

申请日：2019-10-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeho LEE ,  Hyeonjin SHIN ,  Dongwook LEE ,  Seongjun PARK ,  Kiyoung LEE ,  Eunkyu LEE ,  Sanghyun JO ,  Jinseong HEO

IPC: H01L29/16 ,  H01L29/12 ,  H01L27/15 ,  H01L27/146 ,  H01L27/144 ,  H01L31/0352 ,  H01L51/00 ,  H01L51/05 ,  H01L31/101 ,  H01L31/028 ,  H01L31/09

Abstract: Provided are an optical sensor including graphene quantum dots and an image sensor including an optical sensing layer. The optical sensor may include a graphene quantum dot layer that includes a plurality of first graphene quantum dots bonded to a first functional group and a plurality of second graphene quantum dots bonded to a second functional group that is different from the first functional group. An absorption wavelength band of the optical sensor may be adjusted based on types of functional groups bonded to the respective graphene quantum dots and/or sizes of the graphene quantum dots.

公开(公告)号：US20200055134A1

公开(公告)日：2020-02-20

申请号：US16391477

申请日：2019-04-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Yunseong LEE ,  Sanghyun JO

IPC: B23K3/08 ,  H01L23/00 ,  B23K3/06

Abstract: Provided are a logic switching device and a method of manufacturing the same. The logic switching device may include a domain switching layer adjacent to a gate electrode. The domain switching layer may include a ferroelectric material region and an anti-ferroelectric material region. The domain switching layer may be a non-memory element. The logic switching device may include a channel, a source and a drain both connected to the channel, the gate electrode arranged to face the channel, and the domain switching layer provided between the channel and the gate electrode.