公开(公告)号：US20250008749A1

公开(公告)日：2025-01-02

申请号：US18615116

申请日：2024-03-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyundong LEE ,  Youngmin KIM ,  Joonseok OH ,  Sangyun LEE ,  Changbo LEE

IPC: H10B80/00 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L25/065 ,  H01L25/10

Abstract: A semiconductor package includes a substrate structure having a bridge chip therein; a semiconductor memory device on a first upper surface of the substrate structure and electrically connected to the bridge chip; and a semiconductor logic device on the first upper surface of the substrate structure and spaced apart from the semiconductor memory device, and the semiconductor logic device electrically connected to the bridge chip. The semiconductor memory device may include a redistribution wiring layer on the substrate structure and having a plurality of redistribution wirings; a plurality of buffer dies on a second upper surface of the redistribution wiring layer and electrically connected to the bridge chip through the plurality of redistribution wirings; and a plurality of semiconductor chips sequentially stacked on each of the plurality of buffer dies and electrically connected to the plurality of buffer dies.

公开(公告)号：US20240221795A1

公开(公告)日：2024-07-04

申请号：US18231935

申请日：2023-08-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngwoo PARK ,  Tongsung KIM ,  Youngmin KIM ,  Seungjin PARK ,  Seunghoon LEE ,  Chaekang LIM ,  Youngchul CHO ,  Youngdon CHOI ,  Junghwan CHOI

IPC: G11C7/10 ,  H03F3/45 ,  H03K5/24 ,  H03M1/06

CPC classification number: G11C7/1048 ,  H03F3/45475 ,  H03K5/24 ,  H03M1/0607 ,  H03F2200/375 ,  H03F2203/45044 ,  H03F2203/45212

Abstract: A data converter including an autozeroing circuit including a plurality of gain circuits having a first amplification circuit and a first capacitor connected to the first amplification circuit, the first amplification circuit performing a switch feedthrough offset cancellation operation of storing an offset voltage of the autozeroing circuit in the capacitor through a switch, a comparator circuit including a first input terminal and a second input terminal, the comparator circuit comparing a first input terminal voltage level of the first input terminal with a second input terminal voltage level of the second input terminal, a first switch unit connected between the autozeroing circuit and the comparator circuit, the first switch disconnecting the autozeroing circuit from the comparator circuit during the switch feedthrough offset cancellation operation of the autozeroing circuit, and a second switch unit connected between a first input signal line and a second input signal line.

公开(公告)号：US20240184625A1

公开(公告)日：2024-06-06

申请号：US18480924

申请日：2023-10-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jongseok KIM ,  Youngmin KIM ,  Jonghoon YOON ,  SUNG-JAE CHO ,  Changyong SON

IPC: G06F9/48

CPC classification number: G06F9/4881

Abstract: A method of a system including a processor including recording experiment information of a job in connection with job information generated based on an execution of a job of a computer cluster system, and controlling further execution of a job, by the computer cluster system, by transmitting a change in the experiment information to the computer cluster system based on the job information.

公开(公告)号：US20240147641A1

公开(公告)日：2024-05-02

申请号：US18230012

申请日：2023-08-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minjae YOO ,  Youngmin KIM

IPC: H05K5/02 ,  H05K7/20

CPC classification number: H05K5/0217 ,  H05K7/20963

Abstract: An electronic device includes: a first structure including a first fastening structure; a second structure disposed on an upper portion of the first structure and including a second fastening structure; a third structure disposed on an upper portion of the second structure and including a third fastening structure; and an integrated fastening structure including a first engagement portion and a second engagement portion, the integrated fastening structure being configured to directly connect the first structure, the second structure, and the third structure. Each of the first engagement portion and the second engagement portion is configured to engage a different fastening structure among the first fastening structure, the second fastening structure, and the third fastening structure.