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公开(公告)号：US20150207468A1
公开(公告)日：2015-07-23
申请号：US14594773
申请日：2015-01-12
Applicant: Seiko Instruments Inc.
Inventor： Tsutomu TOMIOKA
CPC classification number: H03F1/523 , H03F1/223 , H03F2200/441
Abstract: Provided is an amplifier circuit including an NMOS transistor having a low drain breakdown voltage and an NMOS transistor having a high drain breakdown voltage connected in series thereto, and capable of preventing breakdown of a drain of the NMOS transistor having a low drain breakdown voltage. A clamp circuit configured to limit a drain voltage of the NMOS transistor having a low drain breakdown voltage is connected to the drain thereof.
Abstract translation: 提供了包括具有低漏极击穿电压的NMOS晶体管和具有与其串联连接的高漏极击穿电压的NMOS晶体管的放大器电路，并且能够防止具有低漏极击穿电压的NMOS晶体管的漏极击穿。 配置成限制具有低漏极击穿电压的NMOS晶体管的漏极电压的钳位电路连接到其漏极。
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公开(公告)号：US20150205315A1
公开(公告)日：2015-07-23
申请号：US14599158
申请日：2015-01-16
Applicant: Seiko Instruments Inc.
Inventor： Tsutomu TOMIOKA
IPC: G05F1/56
Abstract: Provided is a voltage regulator capable of preventing breakdown of a gate of an input transistor even when an overshoot occurs at an output terminal. The voltage regulator includes a diode, which is provided to an input transistor to which a divided voltage of an error amplifier circuit is input. The diode includes a cathode connected to a source of the input transistor and an anode connected to a gate thereof.
Abstract translation: 提供了即使在输出端子发生过冲时也能够防止输入晶体管的栅极的击穿的电压调节器。 电压调节器包括二极管，该二极管被提供给输入晶体管，误差放大器电路的分压被输入到该输入晶体管。 二极管包括连接到输入晶体管的源极的阴极和连接到其栅极的阳极。
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公开(公告)号：US20150171731A1
公开(公告)日：2015-06-18
申请号：US14568973
申请日：2014-12-12
Applicant: Seiko Instruments Inc.
Inventor： Tsutomu TOMIOKA , Masakazu SUGIURA
CPC classification number: H02M1/088 , G05F1/56 , Y10T307/549
Abstract: Provided is a voltage regulator configured to suppress a variation of an output voltage so as to stably operate even when a power supply voltage varies. The voltage regulator includes a control circuit having an input terminal connected to a drain of an output transistor, and an output terminal connected to an error amplifier circuit. The control circuit is configured to cause a boost current to flow through an error amplifier circuit when the output voltage varies beyond a predetermined value.
Abstract translation: 提供了一种电压调节器，其被配置为抑制输出电压的变化，以便即使当电源电压变化时也能够稳定地操作。 电压调节器包括具有连接到输出晶体管的漏极的输入端子和连接到误差放大器电路的输出端子的控制电路。 控制电路被配置为当输出电压变化超过预定值时，使升压电流流过误差放大器电路。
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公开(公告)号：US20140210547A1
公开(公告)日：2014-07-31
申请号：US14167104
申请日：2014-01-29
Applicant: Seiko Instruments Inc.
Inventor： Tsutomu TOMIOKA
IPC: H03F1/26
CPC classification number: H03F1/26 , G06G7/186 , H03F3/387 , H03F3/45475 , H03F2203/45138 , H03F2203/45356 , H03F2203/45512
Abstract: Provided is an operational amplifier circuit having a high tolerance for clock phase difference fluctuations. An FIR filter is used to add an input signal of the FIR filter to a signal obtained by delaying the input signal of the FIR filter. In this manner, chopper noise can be removed. Thus, the operational amplifier circuit may have a high tolerance for clock phase difference fluctuations regardless of the phase difference between clocks for controlling a chopper circuit and the FIR filter.
Abstract translation: 提供了对时钟相位差波动具有高容差的运算放大器电路。 FIR滤波器用于将FIR滤波器的输入信号添加到通过延迟FIR滤波器的输入信号而获得的信号。 以这种方式，可以去除斩波噪声。 因此，与用于控制斩波电路和FIR滤波器的时钟之间的相位差无关，运算放大器电路可能具有对时钟相位差波动的高容差。
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