公开(公告)号：US11044470B2

公开(公告)日：2021-06-22

申请号：US17089267

申请日：2020-11-04

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC. ,  HUMAX CO., LTD.

Inventor： Dongcheol Kim ,  Geonjung Ko ,  Jaehong Jung ,  Juhyung Son ,  Jinsam Kwak

IPC: H04N19/105 ,  H04N19/176

Abstract: A video signal processing method comprises the steps of: acquiring reference samples on a first side of a current block and reference samples on a second side thereof on the basis of pre-restored samples neighboring the current block; acquiring a direct current (DC) value for a prediction of the current block on the basis of a reference sample set composed of at least some of the reference samples on the first side and the reference samples on the second side, wherein the reference sample set includes the number of reference samples raised to a power of 2, obtained by excluding some of the reference samples on the first side and the reference samples on the second side, if the length of the first side and the length of the second side are different; and restoring the current block on the basis of the DC value.

公开(公告)号：US20200322601A1

公开(公告)日：2020-10-08

申请号：US16907081

申请日：2020-06-19

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC. ,  HUMAX CO., LTD.

Inventor： Geonjung KO ,  Juhyung Son ,  Dongcheol Kim ,  Jaehong Jung ,  Jinsam Kwak

IPC: H04N19/105 ,  H04N19/132 ,  H04N19/159 ,  H04N19/176

Abstract: Disclosed is a video signal processing method and device for encoding or decoding a video signal. More specifically, disclosed are a video signal processing method and a video signal processing device for performing the method, the method comprising: obtaining reference line information indicating a reference line for intra prediction of a current block among a plurality of reference lines comprising neighboring samples of the current block; determining, on the basis of the reference line information, an intra prediction mode for the current block among a plurality of intra prediction modes constituting an intra prediction mode set; and decoding the current block on the basis of a plurality of reference samples on the reference line according to the reference line information and the determined intra prediction mode, wherein the plurality of reference lines include a first reference line comprising neighboring samples on a line adjacent to the boundary of the current block and a second reference line comprising neighboring samples on a line spaced a distance corresponding to a predetermined number of samples apart from the boundary of the current block.

公开(公告)号：US12301797B2

公开(公告)日：2025-05-13

申请号：US18584910

申请日：2024-02-22

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Geonjung Ko ,  Dongcheol Kim ,  Juhyung Son ,  Jaehong Jung ,  Jinsam Kwak

IPC: H04N19/105 ,  H04N19/132 ,  H04N19/159 ,  H04N19/167 ,  H04N19/176 ,  H04N19/186 ,  H04N19/33 ,  H04N19/593 ,  H04N19/139

Abstract: A method for processing a video signal, of the present disclosure, comprising the steps of: parsing, from a bitstream, upper level merge with MVD (MMVD) activation information (sps_mmvd_enabled_flag) indicating whether the upper level MMVD including a current block is usable; parsing, from the bitstream, MMVD merge information (mmvd_merge_flag) indicating whether the MMVD is used in the current block, if the upper level MMVD activation information indicates the activation of the MMVD; parsing MMVD distance-related information (mmvd_distance_idx) and MMVD direction-related information (mmvd_direction_idx), if the MMVD merge information indicates that the MMVD is used in the current block; and obtaining MMVD information (mMvdLX) based on the MMVD distance-related information and the MMVD direction-related information, wherein the MMVD information is greater than or equal to −2{circumflex over ( )}17 and is less than or equal to 2{circumflex over ( )}17−1.

公开(公告)号：US12273566B2

公开(公告)日：2025-04-08

申请号：US18360645

申请日：2023-07-27

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Geonjung Ko ,  Dongcheol Kim ,  Juhyung Son ,  Jaehong Jung ,  Jinsam Kwak

IPC: H04N19/70 ,  H04N19/159 ,  H04N19/176 ,  H04N19/52

Abstract: A video signal processing method may comprise the steps of: acquiring a first syntax element indicating whether a subblock-based merging mode is applied to a current block; acquiring a second syntax element indicating whether a merging mode using motion vector difference is applied to the current block, when the first syntax element indicates that the subblock-based merging mode is not applied to the current block; and acquiring a third syntax element indicating a candidate to be used in inter-prediction for the current block, among candidates contained in a mergence candidate list for the current block, when the second syntax element indicates that the merging mode using motion vector difference is applied to the current block.

公开(公告)号：US12273564B2

公开(公告)日：2025-04-08

申请号：US17234688

申请日：2021-04-19

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Geonjung Ko ,  Dongcheol Kim ,  Juhyung Son ,  Jaehong Jung ,  Jinsam Kwak

IPC: H04N19/70 ,  H04N19/159 ,  H04N19/176 ,  H04N19/52

Abstract: A video signal processing method may comprise the steps of: acquiring a first syntax element indicating whether a subblock-based merging mode is applied to a current block; acquiring a second syntax element indicating whether a merging mode using motion vector difference is applied to the current block, when the first syntax element indicates that the subblock-based merging mode is not applied to the current block; and acquiring a third syntax element indicating a candidate to be used in inter-prediction for the current block, among candidates contained in a mergence candidate list for the current block, when the second syntax element indicates that the merging mode using motion vector difference is applied to the current block.

公开(公告)号：US12114001B2

公开(公告)日：2024-10-08

申请号：US17750300

申请日：2022-05-21

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Jaehong Jung ,  Juhyung Son ,  Dongcheol Kim ,  Geonjung Ko ,  Jinsam Kwak

IPC: H01L29/94 ,  H04N19/176 ,  H04N19/186 ,  H04N19/46 ,  H04N19/70 ,  H04N19/96

CPC classification number: H04N19/46 ,  H04N19/176 ,  H04N19/186 ,  H04N19/70 ,  H04N19/96

Abstract: A method for processing a video signal, the method comprising: acquiring a transform skip active flag indicating whether a transform skip flag can exist in a transform unit syntax, the transform skip flag indicating whether a transform skip is applied to a transform block included in a current block; acquiring a palette active flag indicating whether a palette mode is applied; when the transform skip active flag indicates existence of the transform skip flag in the transform unit syntax or the palette active flag indicates application of the palette mode, acquiring information related to a minimum quantization parameter which is allowed in a transform skip mode; acquiring the minimum quantization parameter on the basis of the information related to the minimum quantization parameter; correcting a quantization parameter on the basis of the acquired minimum quantization parameter; and reconstructing the current block on the basis of the corrected quantization parameter.

公开(公告)号：US12081735B2

公开(公告)日：2024-09-03

申请号：US17629385

申请日：2020-07-24

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Geonjung Ko ,  Dongcheol Kim ,  Juhyung Son ,  Jaehong Jung ,  Jinsam Kwak

IPC: H04N19/105 ,  H04N19/132 ,  H04N19/159 ,  H04N19/167 ,  H04N19/176 ,  H04N19/186 ,  H04N19/33 ,  H04N19/593 ,  H04N19/139

CPC classification number: H04N19/105 ,  H04N19/132 ,  H04N19/159 ,  H04N19/167 ,  H04N19/176 ,  H04N19/186 ,  H04N19/33 ,  H04N19/593 ,  H04N19/139

Abstract: A method for processing a video signal, of the present disclosure, comprising the steps of: parsing, from a bitstream, upper level merge with MVD (MMVD) activation information (sps_mmvd_enabled_flag) indicating whether the upper level MMVD including a current block is usable; parsing, from the bitstream, MMVD merge information (mmvd_merge_flag) indicating whether the MMVD is used in the current block, if the upper level MMVD activation information indicates the activation of the MMVD; parsing MMVD distance-related information (mmvd_distance_idx) and MMVD direction-related information (mmvd_direction_idx), if the MMVD merge information indicates that the MMVD is used in the current block; and obtaining MMVD information (mMvdLX) based on the MMVD distance-related information and the MMVD direction-related information, wherein the MMVD information is greater than or equal to −2{circumflex over ( )}17 and is less than or equal to 2{circumflex over ( )}17−1.

公开(公告)号：US12047601B2

公开(公告)日：2024-07-23

申请号：US17596501

申请日：2020-06-10

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Dongcheol Kim ,  Geonjung Ko ,  Jaehong Jung ,  Juhyung Son ,  Jinsam Kwak

IPC: H04N7/12 ,  H04N19/12 ,  H04N19/176 ,  H04N19/593 ,  H04N19/61

CPC classification number: H04N19/593 ,  H04N19/12 ,  H04N19/176 ,  H04N19/61

Abstract: The present disclosure relates to a method and device for processing a video signal and, more specifically, comprises the steps of: parsing, from a bitstream, block-based delta pulse code modulation (BDPCM) enable information indicating whether or not BDPCM has been enabled; when the BDPCM enable information indicates that the BDPCM has been enabled, the width of a current block is less than or equal to a first value, and the height of the current block is less than or equal to a second value, parsing, from the bitstream, intra BDPCM information indicating whether or not the BDPCM is to be applied to the current block; when the intra BDPCM information indicates that the BDPCM is to be applied to the current block, parsing, from the bitstream, intra BDPCM direction information regarding the current block; and reconstructing the current block on the basis of the intra BDPCM direction information.

公开(公告)号：US12041273B2

公开(公告)日：2024-07-16

申请号：US18065919

申请日：2022-12-14

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Dongcheol Kim ,  Jaehong Jung ,  Geonjung Ko ,  Juhyung Son ,  Jinsam Kwak

IPC: H04N19/70 ,  H04N19/172 ,  H04N19/82

CPC classification number: H04N19/70 ,  H04N19/172 ,  H04N19/82

Abstract: A video signal decoding device comprises a processor, wherein: the processor decodes a sequence parameter set (SPS) raw byte sequence payload (RBSP) syntax included in a bitstream of a video signal, and decodes the bitstream on the basis of the decoding result of the SPS RBSP syntax; the SPS RBSP syntax includes a first syntax element related to the number of one or more sub-pictures configuring one picture, and a second syntax element indicating whether to process a boundary of the one or more sub-pictures as a boundary of the one picture on the basis of the first syntax element; and the second syntax element is parsed only when the number of the one or more sub-pictures is two or more.

公开(公告)号：US11706440B2

公开(公告)日：2023-07-18

申请号：US17460117

申请日：2021-08-27

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Geonjung Ko ,  Dongcheol Kim ,  Juhyung Son ,  Jaehong Jung ,  Jinsam Kwak

IPC: H04N19/105 ,  H04N19/53 ,  H04N19/57 ,  H04N19/513

CPC classification number: H04N19/513 ,  H04N19/53 ,  H04N19/57

Abstract: A video signal decoding device comprising a processor, wherein the processor is configured to: obtain reference samples corresponding to a first side of a current block and reference samples corresponding to a second side of the current block, obtain a direct current (DC) value for prediction of the current block based on a reference sample set comprising at least some of the reference samples corresponding to the first side and the reference samples corresponding to the second side, and reconstruct the current block based on the DC value.