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    Stress control of semiconductor microstructures for thin film growth
    231.
    发明申请
    Stress control of semiconductor microstructures for thin film growth 有权
    用于薄膜生长的半导体微结构的应力控制

    公开(公告)号：US20030168659A1

    公开(公告)日：2003-09-11

    申请号：US10302777

    申请日：2002-11-22

    Inventor： Amit Lal ,  Max G. Lagally ,  Chung Hoon Lee ,  Paul Powell Rugheimer

    IPC: H01L029/04 ,  H01L031/036

    CPC classification number: B81C1/00666 ,  B81C2201/0167 ,  B82Y10/00 ,  B82Y30/00 ,  H01L29/78603 ,  H01L29/78639 ,  Y10S438/962

    Abstract: A suspended semiconductor film is anchored to a substrate at at least two opposed anchor positions, and film segments are deposited on the semiconductor film adjacent to one or more of the anchor positions to apply either tensile or compressive stress to the semiconductor film between the film segments. A crystalline silicon film may be anchored to the substrate and have tensile stress applied thereto to reduce the lattice mismatch between the silicon and a silicon-germanium layer deposited onto the silicon film. By controlling the level of stress in the silicon film, the size, density and distribution of quantum dots formed in a high germanium content silicon-germanium film deposited on the silicon film can be controlled.

    Abstract translation: 悬浮的半导体膜在至少两个相对的锚固位置处锚定到基底，并且膜部分沉积在与一个或多个锚定位置相邻的半导体膜上，以将拉伸或压缩应力施加到半导体膜之间 。 结晶硅膜可以锚定到基底并且施加拉伸应力以减小硅和淀积到硅膜上的硅 - 锗层之间的晶格失配。 通过控制硅膜中的应力水平，可以控制沉积在硅膜上的高锗含量硅 - 锗膜中形成的量子点的尺寸，密度和分布。

    Semiconductor device and method of fabricating the same
    232.
    发明申请
    Semiconductor device and method of fabricating the same 失效
    半导体装置及其制造方法

    公开(公告)号：US20030132444A1

    公开(公告)日：2003-07-17

    申请号：US10352027

    申请日：2003-01-28

    Applicant: ATR ADVANCED TELECOMMUNICATIONS RESEARCH INSTITUTE INTERNATIONAL

    Inventor： Pablo O. Vaccaro

    IPC: H01L027/15

    CPC classification number: B81C1/00666 ,  B81C2201/0167 ,  H01L33/0079 ,  H01L33/20 ,  H01S5/18366

    Abstract: A release layer composed of AlGaAs, a strain layer, a strain compensation layer composed of an InGaAs, and a component layer are formed on a GaAs substrate. The component layer includes a DBR film. A recess for defining a bent region is formed in the component layer. The component layer, the strain compensation layer, the strain layer, and the release layer are removed in an approximately U shape, thereby forming a groove. The release layer under the strain layer is selectively removed. The strain layer is bent at a region below the recess so as to relax strain caused by the difference in the lattice constant between the InGaAs layer and the GaAs layer, and the component layer stands perpendicularly to the GaAs substrate.

    Abstract translation: 在GaAs衬底上形成由AlGaAs构成的剥离层，应变层，由InGaAs构成的应变补偿层和成分层。 组件层包括DBR膜。 在组件层中形成用于限定弯曲区域的凹部。 将组分层，应变补偿层，应变层和剥离层以大致U形除去，从而形成槽。 有选择地去除应变层下的剥离层。 应变层在凹部下方的区域弯曲，以缓和由InGaAs层和GaAs层之间的晶格常数差引起的应变，并且元件层垂直于GaAs衬底竖立。

    Semiconductor device and method of fabricating the same
    233.
    发明授权
    Semiconductor device and method of fabricating the same 失效

    公开(公告)号：US06534838B1

    公开(公告)日：2003-03-18

    申请号：US09947389

    申请日：2001-09-07

    Applicant: Pablo O. Vaccaro

    Inventor： Pablo O. Vaccaro

    IPC: H01L2982

    CPC classification number: B81C1/00666 ,  B81C2201/0167 ,  H01L33/0079 ,  H01L33/20 ,  H01S5/18366

    Abstract: A release layer composed of AlGaAs, a strain layer, a strain compensation layer composed of an InGaAs, and a component layer are formed on a GaAs substrate. The component layer includes a DBR film. A recess for defining a bent region is formed in the component layer. The component layer, the strain compensation layer, the strain layer, and the release layer are removed in an approximately U shape, thereby forming a groove. The release layer under the strain layer is selectively removed. The strain layer is bent at a region below the recess so as to relax strain caused by the difference in the lattice constant between the InGaAs layer and the GaAs layer, and the component layer stands perpendicularly to the GaAs substrate.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    234.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 失效
    半导体器件及其制造方法

    公开(公告)号：US20030047740A1

    公开(公告)日：2003-03-13

    申请号：US09947389

    申请日：2001-09-07

    Applicant: ATR Adaptive Communications Research Laboratories

    Inventor： Pablo O. Vaccaro

    IPC: H01L027/15

    CPC classification number: B81C1/00666 ,  B81C2201/0167 ,  H01L33/0079 ,  H01L33/20 ,  H01S5/18366

    Abstract: A release layer composed of AlGaAs, a strain layer, a strain compensation layer composed of an InGaAs, and a component layer are formed on a GaAs substrate. The component layer includes a DBR film. A recess for defining a bent region is formed in the component layer. The component layer, the strain compensation layer, the strain layer, and the release layer are removed in an approximately U shape, thereby forming a groove. The release layer under the strain layer is selectively removed. The strain layer is bent at a region below the recess so as to relax strain caused by the difference in the lattice constant between the InGaAs layer and the GaAs layer, and the component layer stands perpendicularly to the GaAs substrate.

    Abstract translation: 在GaAs衬底上形成由AlGaAs构成的剥离层，应变层，由InGaAs构成的应变补偿层和成分层。 组件层包括DBR膜。 在组件层中形成用于限定弯曲区域的凹部。 将组分层，应变补偿层，应变层和剥离层以大致U形除去，从而形成槽。 有选择地去除应变层下的剥离层。 应变层在凹部下方的区域弯曲，以缓和由InGaAs层和GaAs层之间的晶格常数差引起的应变，并且元件层垂直于GaAs衬底竖立。

    Polysilicon microelectric reflectors
    236.
    发明授权
    Polysilicon microelectric reflectors 有权
    多晶硅微电子反射器

    公开(公告)号：US06450654B1

    公开(公告)日：2002-09-17

    申请号：US09704264

    申请日：2000-11-01

    Applicant: David Alan Koester

    Inventor： David Alan Koester

    IPC: G02S7182

    CPC classification number: B81B3/0072 ,  B81B2201/045 ,  B81C2201/0167 ,  G02B26/0866

    Abstract: A microelectronic reflector is fabricated by forming a first polysilicon layer on a microelectronic substrate, forming a first phosphosilicate glass (PSG) layer on the first polysilicon layer, and reactive ion etching to remove the first PSG layer from at least a portion of the first polysilicon layer. A second polysilicon layer is formed on at least a portion of the first polysilicon layer from which the first PSG layer was removed and a second PSG layer is formed on at least a second portion of the second polysilicon layer. Reactive ion etching is performed to remove the second PSG layer from at least a portion of the second polysilicon layer. A third PSG layer then is formed on at least a portion of the second polysilicon layer from which the second PSG layer was removed. Reactive ion etching is performed to remove the third PSG layer from at least a portion of the second polysilicon layer. By forming a third PSG layer, and reactive ion etching this layer, additional stress may be created in the first and/or second doped polysilicon layers that bends the ends of the doped first and/or second polysilicon layers towards the microelectronic substrate upon release of the treated polysilicon layer from the substrate, compared to doped polysilicon layers on which the third PSG layer was not formed and reactive ion etched. This increased stress may be counteracted by forming a stress-correcting layer on at least a portion of the second polysilicon layer from which the third PSG layer was removed, and then forming a reflective layer such as gold on at least a portion of the stress-correcting layer. The stress-correcting layer preferably comprises platinum, which can produce high stresses that can counteract the stresses in the first and second doped polysilicon layers, to thereby allow a flat mirror and/or beam to be produced.

    Abstract translation: 通过在微电子衬底上形成第一多晶硅层，在第一多晶硅层上形成第一磷硅酸盐玻璃（PSG）层，以及反应离子刻蚀以从第一多晶硅层的至少一部分去除第一PSG层来制造微电子反射器 层。 在去除第一PSG层的第一多晶硅层的至少一部分上形成第二多晶硅层，并且在第二多晶硅层的至少第二部分上形成第二PSG层。 执行反应离子蚀刻以从第二多晶硅层的至少一部分去除第二PSG层。 然后在去除第二PSG层的第二多晶硅层的至少一部分上形成第三PSG层。 执行反应离子蚀刻以从第二多晶硅层的至少一部分去除第三PSG层。 通过形成第三PSG层和反应离子蚀刻该层，可以在第一和/或第二掺杂多晶硅层中产生额外的应力，该第一和/或第二掺杂多晶硅层在释放时折射掺杂的第一和/或第二多晶硅层的端部朝向微电子衬底 与其上未形成第三PSG层的反射离子蚀刻的掺杂多晶硅层相比，来自衬底的处理过的多晶硅层。 这种增加的应力可以通过在去除第三PSG层的第二多晶硅层的至少一部分上形成应力校正层，然后在至少一部分应力层上形成反射层，例如金， 校正层。 应力校正层优选地包括铂，其可以产生可以抵消第一和第二掺杂多晶硅层中的应力的高应力，从而允许产生平坦的反射镜和/或光束。

    Micromachined electrostatic actuator with air gap
    237.
    发明授权
    Micromachined electrostatic actuator with air gap 有权
    具有气隙的微加工静电致动器

    公开(公告)号：US06236491B1

    公开(公告)日：2001-05-22

    申请号：US09320891

    申请日：1999-05-27

    Applicant: Scott Halden Goodwin-Johansson

    Inventor： Scott Halden Goodwin-Johansson

    IPC: G02B2600

    CPC classification number: B81C1/00666 ,  B81B2201/032 ,  B81B2203/0118 ,  B81C2201/0167 ,  G02B6/353 ,  G02B6/3566 ,  G02B6/357 ,  G02B6/3594 ,  H01H59/0009 ,  H01H2059/0081

    Abstract: A MEMS (Micro Electro Mechanical System) electrostatic device operated with lower and more predictable operating voltages is provided. An electrostatic actuator, an electrostatic attenuator of electromagnetic radiation, and a method for attenuating electromagnetic radiation are provided. Improved operating voltage characteristics are achieved by defining a non increasing air gap between the substrate electrode and flexible composite electrode within the electrostatic device. A medial portion of a multilayer flexible composite overlying the electromechanical substrate is held in position regardless of the application of electrostatic force, thereby sustaining the defined air gap. The air gap is relatively constant in separation from the underlying microelectronic surface when the medial portion is cantilevered in one embodiment. A further embodiment provides an air gap that decreases to zero when the medial portion approaches and contacts the underlying microelectronic surface. A moveable distal portion of the flexible composite is biased to curl naturally due to differences in thermal coefficients of expansion between the component layers. In response to electrostatic forces, the distal portion moves and thereby alters the distance separating the flexible composite from the underlying microelectronic surface. Structures and techniques for controlling bias in the medial portion and the resulting air gap are provided. The electrostatic device may be disposed to selectively clear or intercept the path of electromagnetic radiation. Materials used in the attenuator can be selected to pass, reflect, or absorb various types of electromagnetic radiation. A plurality of electromagnetic attenuators may be disposed in an array and selectively activated in subsets.

    Abstract translation: 提供了具有更低和更可预测的工作电压的MEMS（微机电系统）静电装置。 提供静电致动器，电磁辐射的静电衰减器和用于衰减电磁辐射的方法。 通过在静电装置内限定衬底电极和柔性复合电极之间的不增加的空气间隙来实现改进的工作电压特性。 覆盖机电衬底的多层柔性复合体的中间部分保持在适当的位置，而与施加静电力无关，从而维持限定的气隙。 在一个实施例中，当中间部分为悬臂时，气隙与下面的微电子表面分离时相对恒定。 另一实施例提供了当中间部分靠近并接触下面的微电子表面时减小到零的气隙。 由于组件层之间的热膨胀系数的差异，柔性复合材料的可移动远端部分被偏压以自然地卷曲。 响应于静电力，远端部分移动，从而改变将柔性复合材料与下面的微电子表面分开的距离。 提供了用于控制中间部分中的偏压和产生的气隙的结构和技术。 静电装置可以设置成选择性地清除或拦截电磁辐射的路径。 衰减器中使用的材料可以选择通过，反射或吸收各种类型的电磁辐射。 多个电磁衰减器可以被布置成阵列并且选择性地在子集中激活。

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