Abstract:
A system for testing or debugging a system including the integrated circuit having an embedded logic analyzer. In one embodiment, the system includes a computing device coupled to the logic analyzer for receiving the at least one output. A user interface run on the computing device assigns an attribute to at least one signal associated with the logic analyzer, determines a new signal or value not provided by the logic analyzer, the new signal or value being based upon the at least one signal as received from the logic analyzer and upon a predetermined definition, and presents the new signal or value to a system user.
Abstract:
Disclosed is a method for printing a media sheet in a media processing device. The method includes aligning a first portion of a printhead of the media processing device to a print area of the media sheet. The method further includes printing the print area of the media sheet by traversing the printhead over the print area in a first direction. The printing is performed by the first portion. Further, the method includes aligning a second portion of the printhead to the print area by adjusting the media sheet relative to the printhead by an index distance in a direction perpendicular to the first direction. Thereafter, the method includes reprinting the print area by traversing the printhead over the print area in a second direction opposite to the first direction. The reprinting is performed by the second portion.
Abstract:
A method and an imaging apparatus for reducing print grain effect in an image to be printed by a printing device are disclosed. One or more flat field areas, each comprising at least one flat field pixel, are detected in the image. A color value of each detected flat field pixel in the one or more flat field areas is modified using a unique flat field optimized color lookup table. The modification of the color value of each flat field pixel in the image reduces the print grain effect in the image to be printed by the printing device.
Abstract:
An application specific integrated circuit (ASIC) is configured to perform image processing tasks on a printer or other multi-function device. The ASIC includes a processor, a dedicated cache memory, a cache controller and additional Static Random Access Memory (SRAM) normally employed in image processing tasks. This additional SRAM may be dynamically allocated as a cache memory when not otherwise occupied.
Abstract:
Digital images that are produced by an image forming device may be processed using an edge enhancement technique to reduce the effects of halftone color depth reductions. For each element in the original image, certain detail elements are classified by examining the magnitude of pixel intensity gradients between elements of interest in a first window applied at each element and other elements in the first window. If a first predetermined condition is satisfied, those elements locations are stored. After halftoning, a morphological filter may be applied to the same element locations in the halftone image to enhance the halftone image.