公开(公告)号：US20080296764A1

公开(公告)日：2008-12-04

申请号：US11807522

申请日：2007-05-29

Applicant: Kuo-Chin Chang ,  Han-Ping Pu ,  Pei-Haw Tsao

Inventor： Kuo-Chin Chang ,  Han-Ping Pu ,  Pei-Haw Tsao

IPC: H01L23/488 ,  H01L21/44

CPC classification number: H01L24/11 ,  H01L24/81 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/114 ,  H01L2224/1147 ,  H01L2224/1148 ,  H01L2224/116 ,  H01L2224/11902 ,  H01L2224/13019 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00

Abstract: An enhanced wafer level chip scale packaging (WLCSP) copper electrode post is described having one or more pins that protrude from the top of the electrode post. When the solder ball is soldered onto the post, the pins are encapsulated within the solder material. The pins not only add shear strength to the soldered joint between the solder ball and the electrode post but also create a more reliable electrical connection due to the increased surface area between the electrode post/pin combination and the solder ball. Moreover, creating an irregularly shaped solder joint retards the propagation of cracks that may form in the intermetal compounds (IMC) layer formed at the solder joint.

Abstract translation: 描述了增强的晶片级芯片级封装（WLCSP）铜电极柱，其具有从电极柱的顶部突出的一个或多个引脚。 当焊球焊接到柱上时，引脚被封装在焊料材料内。 引脚不仅在焊球和电极柱之间的焊接接头上增加剪切强度，而且由于电极柱/销组合和焊球之间的表面积增加，也产生更可靠的电连接。 此外，产生不规则形状的焊点阻碍了可能在焊接接头形成的金属间化合物（IMC）层中形成的裂纹的传播。

公开(公告)号：US07271480B2

公开(公告)日：2007-09-18

申请号：US11237924

申请日：2005-09-29

Applicant: Kuo-Chin Chang ,  Ching-Yu Ni

Inventor： Kuo-Chin Chang ,  Ching-Yu Ni

IPC: H01L23/20

CPC classification number: H01L23/16 ,  H01L23/36 ,  H01L23/562 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/15311

Abstract: A constraint stiffener for reinforcing an integrated circuit package is provided. In one embodiment, the constraint stiffener comprises a rigid, planar base element for bonding to an integrated circuit substrate. The base element has a plurality of elongated support members, and the base element has an opening therein for surrounding an integrated circuit. The base element and support members reduce warpage due to thermal expansion mismatches between at least the integrated circuit and the substrate. In one embodiment, the elongated support members are detachable from the corners of the base element. In another embodiment, the elongated support members have means for attaching and detaching to the corners of the base element. In yet another embodiment, the elongated support members are detachable from about the midsections of the base element. In another embodiment, the elongated support members have means for attaching and detaching to the midsections of the base element.

Abstract translation: 提供了用于加强集成电路封装的约束加强件。 在一个实施例中，约束加强件包括用于结合到集成电路基板的刚性平面基座元件。 基座元件具有多个细长的支撑构件，并且基座元件具有用于围绕集成电路的开口。 基部元件和支撑构件由于至少集成电路和基板之间的热膨胀失配而减少翘曲。 在一个实施例中，细长支撑构件可从基座元件的角部拆卸。 在另一个实施例中，细长支撑构件具有用于附接和分离到基部元件的角部的装置。 在另一个实施例中，细长的支撑构件可从基部元件的中央部分的周围拆卸。 在另一个实施例中，细长的支撑构件具有用于附接和分离到基部元件的中部的装置。

公开(公告)号：US08704383B2

公开(公告)日：2014-04-22

申请号：US13452562

申请日：2012-04-20

Applicant: Szu-Wei Lu ,  Clinton Chao ,  Ann Luh ,  Tjandra Winata Karta ,  Jerry Tzou ,  Kuo-Chin Chang

Inventor： Szu-Wei Lu ,  Clinton Chao ,  Ann Luh ,  Tjandra Winata Karta ,  Jerry Tzou ,  Kuo-Chin Chang

IPC: H01L23/48 ,  H01L23/52

CPC classification number: H01L23/147 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5386 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01327 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/157 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A silicon-based thin package substrate is used for packaging semiconductor chips. The silicon-based thin package substrate preferably has a thickness of less than about 200 μm. A plurality of traces is formed in the silicon-based thin package substrate, connecting BGA balls and solder bumps. A semiconductor chip may be mounted on the solder bumps. The silicon-based thin package substrate may be used as a carrier of semiconductor chips.

Abstract translation: 硅基薄封装衬底用于封装半导体芯片。 硅基薄封装基板优选具有小于约200μm的厚度。 在硅基薄封装衬底中形成多个迹线，连接BGA球和焊料凸块。 半导体芯片可以安装在焊料凸块上。 硅基薄封装衬底可以用作半导体芯片的载体。

公开(公告)号：US20120299161A1

公开(公告)日：2012-11-29

申请号：US13116201

申请日：2011-05-26

Applicant: Kuo-Chin CHANG ,  Yuh Chern SHIEH

Inventor： Kuo-Chin CHANG ,  Yuh Chern SHIEH

IPC: H01L23/58 ,  H01L21/28

CPC classification number: H01L23/528 ,  H01L21/76802 ,  H01L21/76837 ,  H01L23/3171 ,  H01L23/5283 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03472 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05012 ,  H01L2224/05016 ,  H01L2224/05026 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13006 ,  H01L2224/13023 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01327 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/014 ,  H01L2924/01047 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552

Abstract: The invention relates to a bump structure of a semiconductor device. An exemplary structure for a semiconductor device comprises a substrate; a contact pad over the substrate; a passivation layer extending over the substrate and having an opening with a first width over the contact pad; a conductive via within the opening; and a conductive pillar having a second width completely covering the conductive via, wherein a ratio of the first width to the second width is from about 0.15 to 0.55.

Abstract translation: 本发明涉及半导体器件的凸块结构。 半导体器件的示例性结构包括衬底; 衬底上的接触垫; 钝化层，其延伸在所述衬底上并且具有在所述接触焊盘上的第一宽度的开口; 开口内的导电通孔; 以及具有完全覆盖所述导电通孔的第二宽度的导电柱，其中所述第一宽度与所述第二宽度的比率为约0.15至0.55。

公开(公告)号：US20120199974A1

公开(公告)日：2012-08-09

申请号：US13452562

申请日：2012-04-20

Applicant: Szu Wei Lu ,  Clinton Chao ,  Ann Luh ,  Tjandra Winata Karta ,  Jerry Tzou ,  Kuo-Chin Chang

Inventor： Szu Wei Lu ,  Clinton Chao ,  Ann Luh ,  Tjandra Winata Karta ,  Jerry Tzou ,  Kuo-Chin Chang

IPC: H01L23/48

CPC classification number: H01L23/147 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5386 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01327 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/157 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A silicon-based thin package substrate is used for packaging semiconductor chips. The silicon-based thin package substrate preferably has a thickness of less than about 200 μm. A plurality of traces is formed in the silicon-based thin package substrate, connecting BGA balls and solder bumps. A semiconductor chip may be mounted on the solder bumps. The silicon-based thin package substrate may be used as a carrier of semiconductor chips.

Abstract translation: 硅基薄封装衬底用于封装半导体芯片。 硅基薄封装基板优选具有小于约200μm的厚度。 在硅基薄封装衬底中形成多个迹线，连接BGA球和焊料凸块。 半导体芯片可以安装在焊料凸块上。 硅基薄封装衬底可以用作半导体芯片的载体。

公开(公告)号：US07820543B2

公开(公告)日：2010-10-26

申请号：US11807522

申请日：2007-05-29

Applicant: Kuo-Chin Chang ,  Han-Ping Pu ,  Pei-Haw Tsao

Inventor： Kuo-Chin Chang ,  Han-Ping Pu ,  Pei-Haw Tsao

IPC: H01L21/44 ,  H01L23/48

CPC classification number: H01L24/11 ,  H01L24/81 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/114 ,  H01L2224/1147 ,  H01L2224/1148 ,  H01L2224/116 ,  H01L2224/11902 ,  H01L2224/13019 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00

Abstract: An enhanced wafer level chip scale packaging (WLCSP) copper electrode post is described having one or more pins that protrude from the top of the electrode post. When the solder ball is soldered onto the post, the pins are encapsulated within the solder material. The pins not only add shear strength to the soldered joint between the solder ball and the electrode post but also create a more reliable electrical connection due to the increased surface area between the electrode post/pin combination and the solder ball. Moreover, creating an irregularly shaped solder joint retards the propagation of cracks that may form in the intermetal compounds (IMC) layer formed at the solder joint.

Abstract translation: 描述了增强的晶片级芯片级封装（WLCSP）铜电极柱，其具有从电极柱的顶部突出的一个或多个引脚。 当焊球焊接到柱上时，引脚被封装在焊料材料内。 引脚不仅在焊球和电极柱之间的焊接接头上增加剪切强度，而且由于电极柱/销组合和焊球之间的表面积增加，也产生更可靠的电连接。 此外，产生不规则形状的焊点阻碍了可能在焊接接头形成的金属间化合物（IMC）层中形成的裂纹的传播。

公开(公告)号：US20060180944A1

公开(公告)日：2006-08-17

申请号：US11400316

申请日：2006-04-10

Applicant: Kuo-Chin Chang ,  Simon Lu

Inventor： Kuo-Chin Chang ,  Simon Lu

IPC: H01L23/48

CPC classification number: H01L23/49838 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/562 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/15311 ,  H01L2224/0401

Abstract: A flip chip ball grid array package is provided. In one embodiment, a flip chip ball grid array package comprises a substrate having an upper surface and a lower surface opposite the upper surface and a microelectronic element comprising a set of solder balls being secured to the upper surface of the substrate. A constraint member is secured to the lower surface of the substrate so that the constraint member has a degree of rigidity to reduce warpage due to thermal expansion mismatches between at least the microelectronic element and the substrate.

公开(公告)号：US20050228740A1

公开(公告)日：2005-10-13

申请号：US10822179

申请日：2004-04-09

Applicant: Kuo-Chin Chang ,  Wu Ma ,  Junma Zheng

Inventor： Kuo-Chin Chang ,  Wu Ma ,  Junma Zheng

IPC: G06Q40/00 ,  G06F17/60

CPC classification number: G06Q40/04

Abstract: A machine purchasing system includes a database server (1), an application server (2), and a plurality of distributed client computers (4). The system receives historical transaction records from a financial management system (6) and current prices from an electronic marketing system (5), and sets a base price for each to-be-purchased machine based on the above received information. Users select one or more eligible suppliers based on the base price and the supplier's information. The client computers are for searching information stored in the database server. A related machine purchasing method is also disclosed.

Abstract translation: 机器采购系统包括数据库服务器（1），应用服务器（2）和多个分布式客户端计算机（4）。 该系统从财务管理系统（6）和电子营销系统（5）的当前价格收到历史交易记录，并根据上述收到的信息为每个待购买机器设定基准价格。 用户根据基准价格和供应商信息选择一个或多个符合条件的供应商。 客户端计算机用于搜索存储在数据库服务器中的信息。 还公开了一种相关的机器采购方法。