Method to Shorten Crystal Oscillator's Startup Time
    21.
    发明申请
    Method to Shorten Crystal Oscillator's Startup Time 有权
    缩短晶体振荡器启动时间的方法

    公开(公告)号:US20130141171A1

    公开(公告)日:2013-06-06

    申请号:US13519733

    申请日:2010-12-28

    CPC classification number: H03L7/00 H03B5/364 H03B2200/0094 H03L3/00

    Abstract: An oscillator circuit includes an amplifier including at least two terminals for receiving a crystal and an automatic amplitude control loop coupled to the amplifier including biasing circuitry switched between a first operational mode and a second operational mode. The first operational mode occurs during an initial time period and the second operational mode occurs after the initial time period is expired. The biasing circuitry includes first and second PMOS transistor circuits, each transistor circuit including an unswitched PMOS transistor and a switched PMOS transistor. Alternatively, the biasing circuitry can include first and second NMOS transistor circuits, each transistor circuit including an unswitched NMOS transistor and a switched NMOS transistor. The biasing circuitry is under control of an internally generated control signal.

    Abstract translation: 振荡器电路包括放大器,其包括用于接收晶体的至少两个端子和耦合到放大器的自动幅度控制环路,该放大器包括在第一操作模式和第二操作模式之间切换的偏置电路。 第一操作模式在初始时间段期间发生,并且在初始时间段到期之后发生第二操作模式。 偏置电路包括第一和第二PMOS晶体管电路,每个晶体管电路包括非开关PMOS晶体管和开关PMOS晶体管。 或者,偏置电路可以包括第一和第二NMOS晶体管电路,每个晶体管电路包括非开关NMOS晶体管和开关NMOS晶体管。 偏置电路在内部产生的控制信号的控制下。

    Plating Process and Structure
    22.
    发明申请
    Plating Process and Structure 有权
    电镀工艺与结构

    公开(公告)号:US20130119382A1

    公开(公告)日:2013-05-16

    申请号:US13297845

    申请日:2011-11-16

    CPC classification number: H01L22/32

    Abstract: A system and method for plating a contact is provided. An embodiment comprises forming protective layers over a contact and a test pad, and then selectively removing the protective layer over the contact without removing the protective layer over the test pad. With the protective layer still on the test pad, a conductive layer may be plated onto the contact without plating it onto the test pad. After the contact has been plated, the protective layer over the contact may be removed.

    Abstract translation: 提供了一种用于电镀触点的系统和方法。 一个实施例包括在触点和测试垫上形成保护层,然后在触头上选择性地去除保护层,而不需要在测试垫上移除保护层。 在保护层仍在测试焊盘上的情况下,可以将导电层电镀到触点上,而不将其覆盖在测试焊盘上。 接触电镀后,触点上的保护层可以被去除。

    Reducing resistivity in interconnect structures of integrated circuits
    24.
    发明授权
    Reducing resistivity in interconnect structures of integrated circuits 有权
    降低集成电路互连结构中的电阻率

    公开(公告)号:US08426307B2

    公开(公告)日:2013-04-23

    申请号:US13036599

    申请日:2011-02-28

    Inventor: Cheng-Lin Huang

    Abstract: An integrated circuit structure having improved resistivity and a method for forming the same are provided. The integrated circuit structure includes a dielectric layer, an opening in the dielectric layer, an oxide-based barrier layer directly on sidewalls of the opening, and conductive materials filling the remaining portion of the opening.

    Abstract translation: 提供了具有改进的电阻率的集成电路结构及其形成方法。 集成电路结构包括电介质层,电介质层中的开口,直接位于开口侧壁上的基于氧化物的阻挡层,以及填充开口的剩余部分的导电材料。

    METHOD FOR ADJUSTING TRENCH DEPTH OF SUBSTRATE
    25.
    发明申请
    METHOD FOR ADJUSTING TRENCH DEPTH OF SUBSTRATE 有权
    调整基板深度的方法

    公开(公告)号:US20130059442A1

    公开(公告)日:2013-03-07

    申请号:US13282593

    申请日:2011-10-27

    CPC classification number: H01L21/3065 H01L21/3081 H01L21/3083

    Abstract: A method for adjusting the trench depth of a substrate has the steps as follows. Forming a patterned covering layer on the substrate, wherein the patterned covering layer defines a wider spacing and a narrower spacing. Forming a wider buffering layer arranged in the wider spacing and a narrower buffering layer arranged in the narrower spacing. The thickness of the narrower buffering layer is thinner than the wider buffering layer. Implementing dry etching process to make the substrate corresponding to the wider and the narrower buffering layers form a plurality of trenches. When etching the wider and the narrower buffering layers, the narrower buffering layer is removed firstly, so that the substrate corresponding to the narrower buffering layer will be etched early than the substrate corresponding to the wider buffering layer.

    Abstract translation: 用于调整衬底的沟槽深度的方法具有以下步骤。 在衬底上形成图案化的覆盖层,其中图案化覆盖层限定更宽的间隔和更窄的间隔。 形成更宽的间隔布置的较宽的缓冲层和以较窄的间隔布置的较窄的缓冲层。 较窄的缓冲层的厚度比较宽的缓冲层薄。 实施干蚀刻工艺以使与较宽和较窄缓冲层相对应的衬底形成多个沟槽。 当蚀刻较宽和较窄的缓冲层时,首先去除较窄的缓冲层,使得对应于较窄缓冲层的衬底将比对应于较宽缓冲层的衬底早蚀刻。

    TESTING SYSTEM AND METHOD HAVING WIRELESS DATA TRANSMISSION CAPABILITY
    26.
    发明申请
    TESTING SYSTEM AND METHOD HAVING WIRELESS DATA TRANSMISSION CAPABILITY 审中-公开
    具有无线数据传输能力的测试系统和方法

    公开(公告)号:US20130046503A1

    公开(公告)日:2013-02-21

    申请号:US13308508

    申请日:2011-11-30

    CPC classification number: G06F11/3672

    Abstract: Testing system and method with wireless transmission tested data function are provided. An electronic device performs self-testing by a testing program or a testing instrument so as to generate tested data and transmits the tested data to a server via a wireless network. A processing device linked to the server via the wireless network obtains and processes the tested data so as to generate processed data. The processing device further transmits the processed data to the server via the wireless network. Accordingly, the processing device immediately and remotely monitors the electronic device, which is located on a production line, thereby effectively reducing manpower and costs.

    Abstract translation: 提供了具有无线传输测试数据功能的测试系统和方法。 电子设备通过测试程序或测试仪器执行自检,以生成测试数据,并通过无线网络将测试数据发送到服务器。 通过无线网络链接到服务器的处理设备获得并处理测试数据,以产生处理后的数据。 处理装置还经由无线网络将经处理的数据发送到服务器。 因此,处理装置立即远程监视位于生产线上的电子装置,从而有效地降低人力和成本。

    Centralized account reputation
    27.
    发明授权
    Centralized account reputation 有权
    集中帐号信誉

    公开(公告)号:US08359632B2

    公开(公告)日:2013-01-22

    申请号:US12130555

    申请日:2008-05-30

    CPC classification number: H04L63/102 G06Q10/107 H04L51/12 H04L67/306

    Abstract: A centralized account reputation system differentiates between illegitimate users and legitimate users using reputation scores associated with the users' online accounts. The system restricts the access of illegitimate users to certain network services while minimizing its negative effects on legitimate users. The system can manage the life cycle of an online account, considering data about the account that is obtained throughout the account network to compute the online account reputation score and allocating access to network services based on the online account reputation score. For example, a reputation score may be embedded in a security token that can be accessed by multiple services on the account network, so that each service can determine the appropriate level of access to be granted to the associated user account based on the reputation score. Various types of online account behavior over time can improve or diminish the online account's reputation.

    Abstract translation: 集中帐户信誉系统区分非法用户和合法用户使用与用户在线账户相关联的信誉评分。 该系统限制非法用户访问某些网络服务,同时最大限度地减少其对合法用户的负面影响。 系统可以管理在线帐户的生命周期,考虑在整个帐户网络中获得的帐户的数据,以计算在线帐户信誉分数,并根据在线帐户信誉评分分配对网络服务的访问。 例如,信誉分数可以嵌入在可由帐户网络上的多个服务访问的安全令牌中,使得每个服务可以基于信誉分数来确定被授予相关联的用户帐户的适当的访问级别。 随着时间的推移,各种类型的在线帐户行为可以改善或减少在线帐户的声誉。

    Methods for Via Structure with Improved Reliability
    28.
    发明申请
    Methods for Via Structure with Improved Reliability 有权
    通过结构改进可靠性的方法

    公开(公告)号:US20120322261A1

    公开(公告)日:2012-12-20

    申请号:US13595835

    申请日:2012-08-27

    Abstract: Methods for forming a via structure are provided. The method includes depositing a first-layer conductive line over a semiconductor substrate, forming a dielectric layer over the first-layer conductive line, forming a via opening in the dielectric layer and exposing the first-layer conductive line in the via opening, forming a recess portion in the first-layer conductive line, and filling the via opening to form a via extending through the dielectric layer to the first-layer conductive line. The via has a substantially tapered profile and substantially extends into the recess in the first-layer conductive line.

    Abstract translation: 提供了形成通孔结构的方法。 该方法包括在半导体衬底上沉积第一层导电线,在第一层导电线上形成电介质层,在电介质层中形成通孔,并在通路孔中露出第一层导电线,形成 在第一层导电线中的凹陷部分,并且填充通孔开口以形成延伸通过介电层到第一层导电线的通孔。 通孔具有基本上锥形的轮廓并且基本上延伸到第一层导电线中的凹部中。

    Authenticating linked accounts
    30.
    发明授权
    Authenticating linked accounts 有权
    验证关联帐户

    公开(公告)号:US08327428B2

    公开(公告)日:2012-12-04

    申请号:US11565611

    申请日:2006-11-30

    Abstract: Embodiments of authenticating linked accounts are presented herein. In an implementation, an authentication service provides functionality to form links between a plurality of user accounts. A client may then authenticate by providing credentials for one account in a group of linked accounts, and is permitted access to each account in the group of linked accounts based upon the linking. Thus, a single sign-in of a client to one account may permit the client to obtain services for service providers corresponding to multiple linked accounts, without an individual sign-in to each account.

    Abstract translation: 本文给出了认证链接帐户的实施例。 在实现中,认证服务提供了在多个用户帐户之间形成链接的功能。 然后,客户端可以通过为一组链接的帐户中的一个帐户提供凭证来认证,并且允许基于链接来访问链接帐户组中的每个帐户。 因此,客户端对一个帐户的单一登录可以允许客户端获得与多个关联帐户相对应的服务提供商的服务,而无需个人登录到每个帐户。

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