公开(公告)号：US20250112596A1

公开(公告)日：2025-04-03

申请号：US18480322

申请日：2023-10-03

Applicant: STMicroelectronics International N.V.

Inventor： Alessio Emanuele Vergani ,  Francesco Piscitelli ,  Michele Bartolini

IPC: H03F1/02 ,  H03K5/24 ,  H03K19/20

Abstract: According to an embodiment, an envelope detector circuit for detecting an envelope of a signal from a sensor in a pre-amplifier circuit of a hard disk drive is provided. The circuit includes a half-wave rectifier, a low-pass filter, and a differential full-wave rectifier. The half-wave rectifier receives a differential voltage from the sensor indicating a fly height of the hard disk drive and generates a pair of single-ended output waveforms based on the differential voltage. Each pair of single-ended output waveforms has a positive polarity for a half-cycle it passes through. The low-pass filter includes a first and a second low-pass filter. The low-pass filter allows low-frequency signals from the pair of single-ended output waveforms to pass through while attenuating or blocking higher-frequency signals. The differential full-wave rectifier reconstructs a differential signal from the low-pass filter while removing DC rectified components.

公开(公告)号：US20250112553A1

公开(公告)日：2025-04-03

申请号：US18480340

申请日：2023-10-03

Applicant: STMicroelectronics International N.V.

Inventor： Claudio Bona ,  Kien Beng Tan

IPC: H02M3/158 ,  H02J7/00 ,  H02M1/00

Abstract: According to an embodiment, a method of operating an M-level buck converter in a battery charging circuit is provided. The M-level buck converter includes 2×N×(M−1) number of transistors. M and N are greater than one. The method includes operating the M-level buck converter in a first mode of the battery charging circuit corresponding to a high-current charge mode. The method further includes operating the M-level buck converter in a second mode of the battery charging circuit corresponding to a low-current charge mode. In the first mode, 2×N×(M−1) number of transistors are switched ON and OFF. In the second mode, 2×(M−1) number of transistors are switched ON and OFF and 2×N×(M−1)−2×(M−1) number of transistors are fully deactivated.

公开(公告)号：US20250112492A1

公开(公告)日：2025-04-03

申请号：US18478553

申请日：2023-09-29

Applicant: STMicroelectronics International N.V.

Inventor： Roberto LA ROSA

IPC: H02J7/34 ,  H02J7/00

Abstract: Disclosed is an energy autonomous system including an energy transducer, a first capacitor, a second capacitor having greater capacitance than the first capacitor, and a microprocessor. The microprocessor includes a first terminal electrically coupled to the energy transducer and the first capacitor; a second terminal electrically coupled to the second capacitor; a switch that is in a conductive state in which the switch electrically couples the first terminal and second terminals together, or a nonconductive state in which the switch does not electrically couple first terminal and second terminals together; a voltage detector that detects a voltage at the first terminal; and a processor coupled to the voltage detector and the switch. The processor controls charging of the second capacitor by controlling the switch to be in the conductive state or the nonconductive state based on the voltage at the first terminal detected by the voltage detector.

公开(公告)号：US20250112350A1

公开(公告)日：2025-04-03

申请号：US18478758

申请日：2023-09-29

Applicant: STMICROELECTRONICS INTERNATIONAL N.V. ,  CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE ,  INSTITUT POLYTECHNIQUE DE GRENOBLE ,  UNIVERSITE GRENOBLE ALPES

Inventor： David OUATTARA ,  Cedric DURAND ,  Frederic PAILLARDET

IPC: H01P1/18 ,  H03H7/18 ,  H03H11/20

Abstract: Various embodiments of the present disclosure provide a phase shifter including a plurality of digital phase shifters, each digital phase shifter of the plurality of the digital phase shifters configured to vary a phase of a phase shifter input signal by a corresponding phase shift value, and a continuous phase shifter configured to vary the phase of the phase shifter input signal with a variable phase shift value. In various embodiments, the continuous phase shifter comprises a continuous phase shifter load configured to receive a control voltage and vary the variable phase shift value using the control voltage.

公开(公告)号：US20250111878A1

公开(公告)日：2025-04-03

申请号：US18883201

申请日：2024-09-12

Applicant: STMicroelectronics International N.V.

Inventor： Fabio Enrico Carlo Disegni ,  Cesare Torti ,  Davide Manfré ,  Massimo Caruso ,  Maurizio Francesco Perroni

IPC: G11C16/08 ,  G11C16/10 ,  G11C16/28

Abstract: A row decoder circuit includes an input node receiving a row selection signal and an output node coupled to a memory device word line. A pull-down circuit couples the word line to ground in response to the row selection signal being asserted. A pull-up circuit couples the word line to a supply node in response to a deselection signal being de-asserted. An inverter circuit receives as input a control signal from a control node and produces the deselection signal. A current generator sources a biasing current to the control node. A further pull-down circuit couples the control node to ground in response to the row selection signal being asserted, and comprises a first cascode n-channel transistor, a cascode p-channel transistor, a second cascode n-channel transistor, and at least one selection transistor controlled by the row selection signal, all having their conductive channels arranged in series.

公开(公告)号：US20250111186A1

公开(公告)日：2025-04-03

申请号：US18830236

申请日：2024-09-10

Applicant: STMicroelectronics International N.V.

Inventor： Antonio Sismundo ,  Giuliano Filpi ,  Antonio Amoroso ,  Massimo Sena

IPC: G06K19/077

Abstract: A dual interface laminated card having a stack of layers includes at least a first core plastic layer, a second core plastic layer disposed over the first core plastic layer, an antenna inlay disposed between the second core plastic layer and first core plastic layer, and a micromodule disposed over the second core plastic layer. The core plastic layers are recycled plastic layers comprising a major percentage, in particular at least 80%, of low surface energy plastic. The laminated card further comprises at least a first layer of polyurethane heat activatable glue, coupled to a side facing the antenna inlay of at least one of the first and second core plastic layers such that the antenna inlay and the at least one core plastic layer are bonded together.

公开(公告)号：US20250110696A1

公开(公告)日：2025-04-03

申请号：US18903498

申请日：2024-10-01

Applicant: STMicroelectronics International N.V.

Inventor： Fabrice ROMAIN

IPC: G06F7/533

Abstract: A digital multiplicand is received. An initial digital multiplier including logical 0s and 1s is also received. The initial multiplier is processed including at the beginning of each string with at least one logical 1 of the initial multiplier, by applying, or not, in a selective manner, a Booth encoding on said string so as to output a final multiplier. The multiplicand is then multiplied by the final multiplier to produce an output.

公开(公告)号：US20250110263A1

公开(公告)日：2025-04-03

申请号：US18894603

申请日：2024-09-24

Applicant: STMicroelectronics International N.V.

Inventor： Simon GUILLAUMET ,  Stephanie AUDRAN ,  Benjamin VIANNE ,  James Peter Drummond DOWNING

IPC: G02B1/116 ,  B82Y20/00 ,  B82Y40/00 ,  G02B1/00

Abstract: An optical device includes a metasurface formed by a metasurface substrate having at least a first metasurface layer made of a first material and an array of pillars extending through the first metasurface layer. The pillars are made of a second material different from the first material. The metasurface has a first face and a second face opposite the first face. A first anti-reflection stack is positioned over the first face of the metasurface. The first anti-reflection stack has a third face and a fourth face opposite the third face and positioned over the first face of the metasurface. A metal trace has a portion which is exposed at the third face of the first anti-reflection stack.

公开(公告)号：US20250105999A1

公开(公告)日：2025-03-27

申请号：US18886470

申请日：2024-09-16

Applicant: STMicroelectronics International N.V.

Inventor： Marc HOUDEBINE ,  Bruno LEDUC ,  Florent SIBILLE

IPC: H04L7/00 ,  G06K19/07 ,  H04B5/77

Abstract: A device of contactless communication by active load modulation includes a receive circuit configured to receive as an input a reception signal originating from a magnetic field intended to be received by an antenna. A transmit circuit has an output coupled to the antenna with a modulation signal in phase with the reception signal intended to be delivered thereon. A circuit compensates for a delay of the modulation signal due to the transmit circuit and to the amplitude of the reception signal. The compensation circuit determines a phase-shift value to be applied to an input signal of the transmit circuit to compensate for the delay.

公开(公告)号：US20250103087A1

公开(公告)日：2025-03-27

申请号：US18884579

申请日：2024-09-13

Applicant: STMICROELECTRONICS INTERNATIONAL N.V.

Inventor： Thomas JOUANNEAU ,  Lea Sandrina Frédérique ENGINGER

IPC: G06F1/04 ,  H03K5/135

Abstract: The present disclosure provides a circuit for supplying a clock signal. An example circuit for supplying a clock signal comprises a selector of one signal out of a plurality of clock signals; a switch between the selector and a node for outputting the selected clock signal, the circuit being configured so that the application of a control signal for selecting one of the clock signals causes, in the order, the turning off of the switch, the selection of the signal via the selector, and the turning on of the switch.