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    Automatic generation of models from detected hardware
    21.
    发明授权
    Automatic generation of models from detected hardware 有权

    公开(公告)号：US10360052B1

    公开(公告)日：2019-07-23

    申请号：US14611773

    申请日：2015-02-02

    Applicant: The Mathworks, Inc.

    Inventor： Justyna Zander ,  Zijad Galijasevic ,  Pieter J. Mosterman ,  David Koh

    IPC: G06F13/10 ,  G06F9/455

    Abstract: A method may include establishing a connection with a physical device, by a device. The method may include receiving information identifying the physical device, by the device. The method may include determining physical device information based on receiving the information identifying the physical device, by the device. The physical device information may be a description of the physical device. The method may include generating a set of model elements based on the physical device information, by the device. The set of model elements may include program code associated with simulating a behavior associated with the physical device. The method may include associating the set of model elements with a device model corresponding to the physical device, by the device.

    Systems and methods for tracing performance information from hardware realizations to models
    22.
    发明授权
    Systems and methods for tracing performance information from hardware realizations to models 有权

    公开(公告)号：US10261760B1

    公开(公告)日：2019-04-16

    申请号：US14562356

    申请日：2014-12-05

    Applicant: The Mathworks, Inc.

    Inventor： Yongfeng Gu

    IPC: G06F8/35

    Abstract: Systems and methods trace performance data generated by a hardware synthesis tool chain to model elements of a model. During code generation, an initial in-memory representation is generated for the model. The in-memory representation includes a plurality of nodes that correspond to the model elements. The in-memory representation is subjected to transformations and optimizations creating transitional in-memory representations and a final in-memory representation from which HDL code is generated. A graph builder constructs a genealogy graph that traces the transformations and optimizations. The genealogy graph includes graph objects corresponding to the nodes of the in-memory representations. The synthesis tool chain utilizes the HDL code to perform hardware synthesis. The synthesis tool chain also generates performance data. Utilizing the genealogy graph, the performance data is mapped to the nodes of the initial in-memory representation, and to the elements of the model.

    Reusable component in a modeling environment
    25.
    发明授权
    Reusable component in a modeling environment 有权

    公开(公告)号：US09952837B1

    公开(公告)日：2018-04-24

    申请号：US14676230

    申请日：2015-04-01

    Applicant: The MathWorks, Inc.

    Inventor： David Maclay ,  Jonathan J. Fielder

    IPC: G06F9/44 ,  G06F9/45

    CPC classification number: G06F8/35 ,  G06F8/20 ,  G06F8/31 ,  G06F8/34 ,  G06F8/36 ,  G06F8/38 ,  G06F8/41

    Abstract: A system and method supports reusing model components or component artifacts in a first modeling environment where the model components or artifacts were created in a second environment. An interface to the model components or artifacts from the first modeling environment is analyzed, and compared to an interface from the second environment. A wrapper object is constructed to convert between differences identified among the two interfaces. Utilizing the wrapper object, the model components or component artifacts are reused in the second environment.

    Dual programming interface
    26.
    发明授权
    Dual programming interface 有权

    公开(公告)号：US09886268B1

    公开(公告)日：2018-02-06

    申请号：US14978944

    申请日：2015-12-22

    Applicant: The MathWorks, Inc.

    Inventor： Steven L. Eddins ,  Michelle T. Hirsch ,  Loren Shure ,  Joseph F. Hicklin ,  John N. Little ,  Portia O'Callaghan

    IPC: G06F9/45 ,  G06F9/44

    CPC classification number: G06F8/70 ,  G06F8/22 ,  G06F8/24 ,  G06F8/33 ,  G06F8/34 ,  G06F9/54 ,  G06F17/212

    Abstract: A computer-implemented method for providing an informal interface and a formal interface to a computing application using a computer is provided. The informal interface includes first routines, the first routines using an informal input format. The method also includes providing a formal interface using the computer, where the formal interface includes second routines. The second routines support developer functionality, and the second routines using a formal input format. The method includes receiving a first input having a first routine input format, the first routine input format complying with the informal input format, or a second input having a second routine input format, the second routine input format complying with the formal input format. The method includes processing the received first input or the received second input and performing a computing operation based on the processing.

    Rendering graphical scenes
    27.
    发明授权
    Rendering graphical scenes 有权

    公开(公告)号：US09761026B1

    公开(公告)日：2017-09-12

    申请号：US15003982

    申请日：2016-01-22

    Applicant: The MathWorks, Inc.

    Inventor： James D. Barabas ,  Eric M. Ludlam ,  Michael P. Garrity ,  Benjamin V. Hinkle

    IPC: G06T11/20 ,  G06F17/21 ,  G06F17/24

    CPC classification number: G06T11/206

    Abstract: A device may receive information that specifies a graphical scene. The graphical scene may include a coordinate axis. Data, to be plotted in the graphical scene, may be plotted with regard to the coordinate axis. The device may generate a structured plurality of objects. One or more objects, of the structured plurality of objects, may store properties that define the graphical scene. A particular object, of the one or more objects, may store properties that define one or more elements of the coordinate axis. The device may receive information identifying a modification to an element of the coordinate axis, of the one or more elements of the coordinate axis. The device may modify a property of the properties that define the one or more elements of the coordinate axis, based on the instruction, to implement the modification specified by the instruction.

    Restricting class inheritance relationships
    28.
    发明授权
    Restricting class inheritance relationships 有权

    公开(公告)号：US09740458B1

    公开(公告)日：2017-08-22

    申请号：US14673454

    申请日：2015-03-30

    Applicant: The MathWorks, Inc.

    Inventor： Jennifer A. Black ,  David A. Foti

    IPC: G06F9/44

    CPC classification number: G06F8/31 ,  G06F8/315 ,  G06F9/5061

    Abstract: In an embodiment, a system may include a processor having memory storing processor-executable instructions for a programming environment. The processor may perform the following instructions. A first, second, and third class may be defined. The second class may be defined as being compatible with the first class. The third class may be defined as being incompatible with the first class. A fourth class may be defined as a subclass of both the first class and the second class. A fifth class may be prevented from being a subclass of both the first class and the third class.

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