公开(公告)号：US20130292826A1

公开(公告)日：2013-11-07

申请号：US13888422

申请日：2013-05-07

Applicant: BRIDGE SEMICONDUCTOR CORPORATION

Inventor： Charles W.C. LIN ,  Chia-Chung WANG

IPC: H01L21/50 ,  H01L23/498

CPC classification number: H01L21/50 ,  H01L23/49811 ,  H01L23/5384 ,  H01L23/5389 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/9202 ,  H01L2224/92144 ,  H01L2225/1035 ,  H01L2225/1047 ,  H01L2924/18162 ,  H05K1/184 ,  H05K3/4644 ,  H05K2203/1469

Abstract: The present invention relates to a method of making a semiconductor assembly. In accordance with a preferred embodiment, the method includes: preparing a dielectric layer and a supporting board including a stiffener, a bump/flange sacrificial carrier and an adhesive, wherein the adhesive bonds the stiffener to the sacrificial carrier and the dielectric layer covers the supporting board; then removing the bump and a portion of the flange to form a cavity and expose the dielectric layer; then mounting a semiconductor device into the cavity; and then forming a build-up circuitry that includes a first conductive via in direct contact with the semiconductor device and provides signal routing for the semiconductor device. Accordingly, the direct electrical connection between the semiconductor device and the build-up circuitry is advantageous to high I/O and high performance, and the stiffener can provide adequate mechanical support for the build-up circuitry and the semiconductor device.

Abstract translation: 本发明涉及制造半导体组件的方法。 根据优选实施例，该方法包括：制备介电层和包括加强件，凸块/凸缘牺牲载体和粘合剂的支撑板，其中粘合剂将加强件粘合到牺牲载体上，并且介电层覆盖支撑 板; 然后去除所述凸块和所述凸缘的一部分以形成空腔并暴露所述介电层; 然后将半导体器件安装到腔中; 然后形成积聚电路，其包括与半导体器件直接接触的第一导电通孔，并为半导体器件提供信号路由。 因此，半导体器件和积聚电路之间的直接电连接对于高I / O和高性能是有利的，并且加强件可以为积聚电路和半导体器件提供足够的机械支撑。