公开(公告)号：US20160308029A1

公开(公告)日：2016-10-20

申请号：US14902294

申请日：2014-09-12

Applicant: CSMC Technologies Fab1 Co., Ltd.

Inventor： Shengrong Zhong ,  Genyi Wang ,  Xiaoshe Deng ,  Dongfei Zhou

IPC: H01L29/66 ,  H01L29/06 ,  H01L21/311 ,  H01L21/28 ,  H01L29/167 ,  H01L21/027 ,  H01L21/265 ,  H01L21/3213 ,  H01L21/324 ,  H01L21/768 ,  H01L21/02 ,  H01L21/266

CPC classification number: H01L29/66666 ,  H01L21/02576 ,  H01L21/0273 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/28035 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32137 ,  H01L21/32139 ,  H01L21/324 ,  H01L21/768 ,  H01L29/0619 ,  H01L29/167 ,  H01L29/6609 ,  H01L29/66712 ,  H01L29/861

Abstract: A preparation method for a power diode, comprising: providing a substrate (10), the substrate (10) having a front surface and a back surface opposite to the front surface, an N-type layer (20) growing on the front surface of the substrate (10), and the N-type layer (20) having a first surface deviating from the substrate (10); forming a terminal protection ring (31, 32, 33); forming an oxide layer (50), and performing knot pushing on the terminal protection ring (31, 32, 33); conducting photoetching using a photoetching plate of an active region and etching the oxidation layer (50) of the active region, and forming a gate oxide layer (60) on the first surface of the N-type layer (20) of the active region; depositing on the gate oxide layer (60) to form a polysilicon layer (70); conducting photoetching using a polysilicon photoetching plate, taking a photoresist (40) as a mask layer to inject P-type ions into the N-type layer (20), and forming a P-type body region (82) beneath the polysilicon layer (70) through ion scattering; forming an N-type heavily doped region; forming a P+region; conducting thermal annealing, activating injected impurities and removing the photoresist (40); and conducting metallization processing on the first surface and the back surface of the substrate (10).

Abstract translation: 一种用于功率二极管的制备方法，包括：提供基板（10），所述基板（10）具有前表面和与所述前表面相对的后表面的N型层（20），所述N型层（20）在 所述基板（10）和具有偏离所述基板（10）的第一表面的所述N型层（20）。 形成端子保护环（31,32,33）; 形成氧化物层（50），并且对所述端子保护环（31,32,33）施加结压力; 使用有源区的光刻板进行光蚀刻，蚀刻有源区的氧化层（50），在有源区的N型层（20）的第一面上形成栅极氧化层（60） 沉积在栅极氧化物层（60）上以形成多晶硅层（70）; 使用多晶硅光刻板进行光蚀刻，以光致抗蚀剂（40）作为掩模层将P型离子注入到N型层（20）中，并在多晶硅层下形成P型体区（82） 70）通过离子散射; 形成N型重掺杂区域; 形成P +区; 进行热退火，激活注入的杂质和去除光致抗蚀剂（40）; 以及在所述基板（10）的所述第一表面和所述背面上进行金属化处理。