公开(公告)号：US06204195B1

公开(公告)日：2001-03-20

申请号：US09166734

申请日：1998-10-05

Applicant: Rong-Wu Chien ,  Chia-Hui Wu ,  Honda Pai

Inventor： Rong-Wu Chien ,  Chia-Hui Wu ,  Honda Pai

IPC: H01L21302

CPC classification number: H01L21/31053 ,  H01L27/10852 ,  H01L28/84

Abstract: A process for avoiding dishing in a planarizing layer whose final thickness is reduced by Chem. Mech. Polishing, is described. The first step is to coat the surface to be planarized with a layer of a hard dielectric material, such as silicon nitride, prior to depositing the planarizing medium. After the latter has been reflowed, its thickness is reduced by means of CMP. While CMP is being applied, the etch rate is constantly sensed. When the etch front approaches the aforementioned hard layer a decrease in the etch rate is sensed and etching is terminated, thereby eliminating any dishing effects.

Abstract translation: 通过Chem减少其最终厚度的平坦化层中的凹陷的方法。 机械。 抛光，描述。 第一步是在沉积平坦化介质之前，用硬介电材料（例如氮化硅）层涂覆待平坦化的表面。 在后者回流之后，其厚度通过CMP降低。 当施加CMP时，不断地感测蚀刻速率。 当蚀刻前沿接近上述硬层时，感测到蚀刻速率的降低，并且终止蚀刻，从而消除任何凹陷效应。