公开(公告)号：US20210359192A1

公开(公告)日：2021-11-18

申请号：US17390374

申请日：2021-07-30

Applicant: Exo Imaging, Inc.

Inventor： Brian BIRCUMSHAW ,  Sandeep AKKARAJU

IPC: H01L41/047 ,  H01L41/314 ,  H01L41/332

Abstract: Disclosed are multi-poled piezoelectric devices with improved packing density and methods for making such multi-poled piezoelectric devices with improved packing density. The multi-poled piezoelectric devices comprise: a) a top electrode, a piezoelectric layer, and a bottom electrode fabricated on a substrate; b) vias generated by etching the piezoelectric layer, the top electrode, or both; and c) a re-distribution layer (RDL) deposited over one or more of: the top electrode, the piezoelectric layer, the bottom electrode, or the one or more vias.

公开(公告)号：US20210094070A1

公开(公告)日：2021-04-01

申请号：US17119737

申请日：2020-12-11

Applicant: eXo Imaging, Inc.

Inventor： Brian BIRCUMSHAW ,  Sandeep AKKARAJU

IPC: B06B1/06 ,  H01L41/04 ,  H01L41/338 ,  G01S7/52 ,  H01L41/187 ,  G01S15/89 ,  H01L41/047 ,  H01L41/313

Abstract: The present disclosure provides methods to integrate piezoelectric micromachined ultrasonic transducer (pMUT) arrays with an application-specific integrated circuit (ASIC) using thermocompression or eutectic/solder bonding. In an aspect, the present disclosure provides a device comprising a first substrate and a second substrate, the first substrate comprising a pMUT array and the second substrate comprising an electrical circuit, wherein the first substrate and the second substrate are bonded together using thermocompression, wherein any set of individual PMUTs of PMUT array is addressable. In another aspect, the present disclosure provides a device comprising a first substrate and a second substrate, the first substrate comprising a pMUT array and the second substrate comprising an electrical circuit, wherein the first substrate and the second substrate are bonded together using eutectic or solder bonding, wherein any set of individual PMUTs of the PMUT array is addressable.

公开(公告)号：US20210088655A1

公开(公告)日：2021-03-25

申请号：US17095328

申请日：2020-11-11

Applicant: eXo Imaging, Inc.

Inventor： Brian BIRCUMSHAW ,  Sandeep AKKARAJU

IPC: G01S15/89 ,  B06B1/06 ,  H01L41/04 ,  H01L41/047 ,  H01L41/187 ,  H01L41/313 ,  H01L41/338 ,  G01S7/52

Abstract: The present disclosure provides methods to integrate pMUT arrays with an ASIC using solid liquid interdiffusion (SLID). In an aspect, the present disclosure provides a device comprising a first substrate and a second substrate, the first substrate comprising a pMUT device and the second substrate comprising an electrical circuit, wherein the first substrate and the second substrate are bonded together using a conductive bonding pillar, which conductive bonding pillar comprises one or more intermetallic compounds. In another aspect, the present disclosure provides a device comprising a first substrate and a second substrate, the first substrate comprising a pMUT device and the second substrate comprising an electrical circuit, wherein the first substrate and the second substrate are bonded together using a conductive bonding pillar, wherein the bonding is performed at a temperature less than the melting point of the conductive bonding pillar after the bonding.