公开(公告)号：US09837327B2

公开(公告)日：2017-12-05

申请号：US15070303

申请日：2016-03-15

Applicant: Freescale Semiconductor, Inc.

Inventor： Lakshminarayan Viswanathan

IPC: H01L21/44 ,  H01L23/48 ,  H01L23/52 ,  H01L23/04 ,  H01L29/40 ,  H01L23/047 ,  H01L23/00 ,  H01L23/057 ,  H01L23/31 ,  H01L23/14 ,  H01L23/367 ,  H01L21/50 ,  H01L23/492 ,  H01L23/498 ,  H01L25/065 ,  H01L21/288 ,  H01L21/48

CPC classification number: H01L23/047 ,  H01L21/288 ,  H01L21/486 ,  H01L21/4867 ,  H01L21/50 ,  H01L23/057 ,  H01L23/142 ,  H01L23/3121 ,  H01L23/3675 ,  H01L23/3677 ,  H01L23/4924 ,  H01L23/49861 ,  H01L23/49866 ,  H01L24/13 ,  H01L24/27 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/80 ,  H01L24/83 ,  H01L25/0655 ,  H01L2224/2731 ,  H01L2224/29139 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48137 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83447 ,  H01L2224/8384 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/0461 ,  H01L2924/0469 ,  H01L2924/1421 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/15763 ,  H01L2924/16152 ,  H01L2924/16598 ,  H01L2924/171 ,  H01L2924/181 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A semiconductor device package that incorporates a combination of ceramic, organic, and metallic materials that are coupled using silver is provided. The silver is applied in the form of fine particles under pressure and a low temperature. After application, the silver forms a solid that has a typical melting point of silver, and therefore the finished package can withstand temperatures significantly higher than the manufacturing temperature. Further, since the silver is an interfacial material between the various combined materials, the effect of differing material properties between ceramic, organic, and metallic components, such as coefficient of thermal expansion, is reduced due to low temperature of bonding and the ductility of the silver.

公开(公告)号：US09800208B2

公开(公告)日：2017-10-24

申请号：US15044701

申请日：2016-02-16

Applicant: Freescale Semiconductor, Inc.

Inventor： Mahesh K. Shah ,  Jerry L. White ,  Li Li ,  Hussain H. Ladhani ,  Audel A. Sanchez ,  Lakshminarayan Viswanathan ,  Fernando A. Santos

IPC: H03F1/00 ,  H03F1/02 ,  H03F3/195 ,  H03F3/213 ,  H03F1/56 ,  H03F3/21 ,  H03F1/30 ,  H03H1/00 ,  H01L23/31 ,  H01L23/495 ,  H01L23/66 ,  H03F3/193 ,  H05K7/00 ,  H01L23/64 ,  H03H7/38

CPC classification number: H03F1/0288 ,  H01L23/3107 ,  H01L23/49562 ,  H01L23/642 ,  H01L23/66 ,  H01L2223/665 ,  H01L2223/6655 ,  H01L2223/6666 ,  H01L2224/49175 ,  H01L2924/0002 ,  H03F1/0283 ,  H03F1/30 ,  H03F1/565 ,  H03F3/193 ,  H03F3/195 ,  H03F3/211 ,  H03F3/213 ,  H03F2200/267 ,  H03F2200/451 ,  H03F2200/555 ,  H03F2203/21103 ,  H03F2203/21106 ,  H03F2203/21139 ,  H03H1/00 ,  H03H7/38 ,  H03H2001/0021 ,  H05K7/005 ,  H01L2924/00

Abstract: An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.

公开(公告)号：US09484222B2

公开(公告)日：2016-11-01

申请号：US14184266

申请日：2014-02-19

Applicant: Freescale Semiconductor, Inc.

Inventor： Hussain H. Ladhani ,  Lu Li ,  Mahesh K. Shah ,  Lakshminarayan Viswanathan ,  Michael E. Watts

IPC: H01L23/02 ,  H01L27/08 ,  H01L21/48 ,  H03F3/193 ,  H03F3/21 ,  H01L25/00 ,  H01L23/66 ,  H03F1/56 ,  H03F3/195

CPC classification number: H01L21/4853 ,  H01L23/66 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2223/6655 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H03F1/565 ,  H03F3/193 ,  H03F3/195 ,  H03F3/21 ,  H03F2200/423 ,  H03F2200/451 ,  H01L2924/00014

Abstract: A semiconductor device, related package, and method of manufacturing same are disclosed. In at least one embodiment, the semiconductor device includes a radio frequency (RF) power amplifier transistor having a first port, a second port, and a third port. The semiconductor device also includes an output lead, a first output impedance matching circuit between the second port and the output lead, and a first additional circuit coupled between the output lead and a ground terminal. At least one component of the first additional circuit is formed at least in part by way of one or more of a plurality of castellations and a plurality of vias.

Abstract translation: 公开了一种半导体器件，相关封装及其制造方法。 在至少一个实施例中，半导体器件包括具有第一端口，第二端口和第三端口的射频（RF）功率放大器晶体管。 半导体器件还包括输出引线，第二端口和输出引线之间的第一输出阻抗匹配电路，以及耦合在输出引线和接地端子之间的第一附加电路。 第一附加电路的至少一个部件至少部分地通过多个城堡和多个通孔中的一个或多个形成。

公开(公告)号：US20160293508A1

公开(公告)日：2016-10-06

申请号：US15070308

申请日：2016-03-15

Applicant: Freescale Semiconductor, Inc.

Inventor： Lakshminarayan Viswanathan

IPC: H01L23/047 ,  H01L23/498 ,  H01L23/367 ,  H01L23/14 ,  H01L25/065 ,  H01L23/31 ,  H01L23/00 ,  H01L23/492

CPC classification number: H01L23/047 ,  H01L21/288 ,  H01L21/486 ,  H01L21/4867 ,  H01L21/50 ,  H01L23/057 ,  H01L23/142 ,  H01L23/3121 ,  H01L23/3675 ,  H01L23/3677 ,  H01L23/4924 ,  H01L23/49861 ,  H01L23/49866 ,  H01L24/13 ,  H01L24/27 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/80 ,  H01L24/83 ,  H01L25/0655 ,  H01L2224/2731 ,  H01L2224/29139 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48137 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83447 ,  H01L2224/8384 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/0461 ,  H01L2924/0469 ,  H01L2924/1421 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/15763 ,  H01L2924/16152 ,  H01L2924/16598 ,  H01L2924/171 ,  H01L2924/181 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A semiconductor device package that incorporates a combination of ceramic, organic, and metallic materials that are coupled using silver is provided. The silver is applied in the form of fine particles under pressure and a low temperature. After application, the silver forms a solid that has a typical melting point of silver, and therefore the finished package can withstand temperatures significantly higher than the manufacturing temperature. Further, since the silver is an interfacial material between the various combined materials, the effect of differing material properties between ceramic, organic, and metallic components, such as coefficient of thermal expansion, is reduced due to low temperature of bonding and the ductility of the silver.

Abstract translation: 提供了结合使用银耦合的陶瓷，有机和金属材料的组合的半导体器件封装。 银在加压和低温下以微粒的形式施加。 应用后，银形成具有典型的银熔点的固体，因此成品封装可承受明显高于制造温度的温度。 此外，由于银是各种组合材料之间的界面材料，所以陶瓷，有机和金属组分之间的不同材料性质（如热膨胀系数）的影响由于低粘结温度和 银。

公开(公告)号：US20160172318A1

公开(公告)日：2016-06-16

申请号：US15050176

申请日：2016-02-22

Applicant: Freescale Semiconductor, Inc.

Inventor： Lakshminarayan Viswanathan ,  Jeffrey K. Jones ,  Scott D. Marshall

IPC: H01L23/66 ,  H01L23/495 ,  H01L23/047

CPC classification number: H01L23/66 ,  H01L23/047 ,  H01L23/49589 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2223/6655 ,  H01L2223/6672 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49052 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00 ,  H01L2224/45099

Abstract: Embodiments of semiconductor devices (e.g., RF devices) include a substrate, an isolation structure, an active device, a lead, and a circuit. The isolation structure is coupled to the substrate, and includes an opening. An active device area is defined by a portion of the substrate surface that is exposed through the opening. The active device is coupled to the substrate surface within the active device area. The circuit is electrically coupled between the active device and the lead. The circuit includes one or more elements positioned outside the active device area (e.g., physically coupled to the isolation structure and/or under the lead). The elements positioned outside the active device area may include elements of an envelope termination circuit and/or an impedance matching circuit. Embodiments also include method of manufacturing such semiconductor devices.

Abstract translation: 半导体器件（例如，RF器件）的实施例包括衬底，隔离结构，有源器件，引线和电路。 隔离结构耦合到衬底，并且包括开口。 有源器件区域由通过开口暴露的衬底表面的一部分限定。 有源器件耦合到有源器件区域内的衬底表面。 电路电耦合在有源器件和引线之间。 电路包括位于有源器件区域外的一个或多个元件（例如，物理耦合到隔离结构和/或在引线下方）。 位于有源器件区域之外的元件可以包括封装端接电路和/或阻抗匹配电路的元件。 实施例还包括制造这种半导体器件的方法。

公开(公告)号：US09105599B2

公开(公告)日：2015-08-11

申请号：US14287141

申请日：2014-05-26

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Jin-Wook Jang ,  Lalgudi M. Mahalingam ,  Audel A. Sanchez ,  Lakshminarayan Viswanathan

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/373 ,  H01L23/057 ,  H01L23/00

CPC classification number: H01L23/373 ,  H01L23/057 ,  H01L23/3731 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/838 ,  H01L2224/83805 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0489 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/00 ,  H01L2924/01014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Embodiments of a semiconductor device include a primary portion of a substrate, a die, and a die attach layer between the die and the primary portion of the substrate. The die attach layer includes a gold interface layer that includes gold and a plurality of first precipitates in the gold. Each of the first precipitates includes a combination of nickel, cobalt, palladium, gold, and silicon.

Abstract translation: 半导体器件的实施例包括基板的主要部分，管芯和管芯与基板的主要部分之间的管芯附着层。 管芯附着层包括金界面层，其包含金和金中的多个第一沉淀物。 每个第一沉淀物包括镍，钴，钯，金和硅的组合。

公开(公告)号：US08963305B2

公开(公告)日：2015-02-24

申请号：US13624232

申请日：2012-09-21

Applicant: Freescale Semiconductor, Inc.

Inventor： Fernando A. Santos ,  Audel A. Sanchez ,  Lakshminarayan Viswanathan

IPC: H01L23/495 ,  H01L23/48

CPC classification number: H01L25/0655 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49513 ,  H01L23/49531 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49579 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29116 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48177 ,  H01L2224/48247 ,  H01L2224/49052 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73203 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2224/85801 ,  H01L2224/8584 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/181 ,  H01L2924/20106 ,  H01L2924/20755 ,  H01L2924/2076 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/13099

Abstract: A packaged semiconductor device may include a leadframe and a die carrier mounted to the leadframe. The die carrier is formed from an electrically and thermally conductive material. A die is mounted to a surface of the die carrier with die attach material having a melting point in excess of 240° C. A first electrical interconnect couples the die and the leadframe. A housing covers portions of the leadframe, die carrier, die and first electrical interconnect.

Abstract translation: 封装的半导体器件可以包括安装到引线框的引线框架和管芯载体。 模具载体由导电和导热材料形成。 模具安装到模具载体的表面，模头附着材料具有超过240℃的熔点。第一电互连使模具和引线框架相连。 壳体覆盖引线框架，管芯载体，管芯和第一电互连部分。