公开(公告)号：US20190221560A1

公开(公告)日：2019-07-18

申请号：US16329348

申请日：2017-08-21

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Yan GU ,  Shikang CHENG ,  Sen ZHANG

IPC: H01L27/07 ,  H01L21/8234

CPC classification number: H01L27/0705 ,  H01L21/265 ,  H01L21/8234 ,  H01L21/823412 ,  H01L21/823425 ,  H01L21/823437 ,  H01L21/823487 ,  H01L21/823493 ,  H01L27/06 ,  H01L29/10 ,  H01L29/66 ,  H01L29/808

Abstract: A device integrated with a depletion-mode junction field-effect transistor and a method for manufacturing the device. The device includes: a well region, which is of a second conduction type and formed within a first conduction region (214); a JFET source (210), which is of a first conduction type and formed within the well region; a metal electrode (212) of the JFET sources formed on the JFET sources (210), which is in contact with the JFET sources (210); a lateral channel region (208), which is of the first conduction type and formed between two adjacent JFET sources (210), while two ends thereof are in contact with the two adjacent JFET sources (210); and a JFET metal gate (213) formed on the well region.