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21.
公开(公告)号:US20180145190A1
公开(公告)日:2018-05-24
申请号:US15603796
申请日:2017-05-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kiyoung LEE , Jinseong HEO , Jaeho LEE , Haeryong KIM , Seongjun PARK , Hyeonjin SHIN , Eunkyu LEE , Sanghyun JO
IPC: H01L31/0216 , H01L31/028 , H01L31/0224 , H01L31/0352 , H01L31/18 , G01N21/59
CPC classification number: H01L31/02161 , G01N21/59 , H01L31/022466 , H01L31/028 , H01L31/0304 , H01L31/035218 , H01L31/1804 , Y02E10/544 , Y02E10/547
Abstract: A broadband multi-purpose optical device includes a semiconductor layer having a light absorption characteristic, a first active layer having a light absorption band different from a light absorption band of the semiconductor layer, a first two-dimensional (2D) material layer adjacent to the first active layer, and a first interfacial layer configured to control a pinning potential of the semiconductor layer and the first active layer. The broadband multi-purpose optical device may further include at least one second active layer, and may include a tandem structure that further includes at least one second 2D material layer. The first active layer and the second active layer may have different light absorption bands. The broadband multi-purpose optical device may further include a second interfacial layer adjacent to the first 2D material layer.
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22.
公开(公告)号:US20250142835A1
公开(公告)日:2025-05-01
申请号:US18927200
申请日:2024-10-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yunseong LEE , Sijung YOO , Seunggeol NAM , Kihong KIM , Yoonsang PARK , Sanghyun JO
Abstract: A semiconductor device, a memory device, and a method of manufacturing the semiconductor device are disclosed. The semiconductor device includes a semiconductor substrate, a ferroelectric layer provided on the semiconductor substrate, an aluminum oxide layer provided on the ferroelectric layer, and a gate electrode provided on the aluminum oxide layer, wherein the aluminum oxide layer includes aluminum, oxygen, and hydrogen, and wherein a content of oxygen in the aluminum oxide layer is more than about 1.5 times and about 2 times or less a content of aluminum in the aluminum oxide layer.
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23.
公开(公告)号:US20240213349A1
公开(公告)日:2024-06-27
申请号:US18396258
申请日:2023-12-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sanghyun JO , Yunseong LEE , Hyangsook LEE , Dukhyun CHOE , Jinseong HEO
CPC classification number: H01L29/516 , H01L29/40111 , H01L29/42392 , H01L29/78391 , H01L29/7851 , H10B51/20 , H10B53/20
Abstract: An electronic device and an electronic apparatus including the electronic device are provided. The electronic device includes a conductive material layer, and a ferroelectric layer covering the conductive material layer. The ferroelectric layer includes a first oxide layer including a first component, and a second oxide layer including hafnium and a second component and having a thickness that is twice or more than a thickness of the first oxide layer.
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公开(公告)号:US20240194761A1
公开(公告)日:2024-06-13
申请号:US18531078
申请日:2023-12-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sanghyun JO , Hyangsook LEE , Eunha LEE , Jinseong HEO
CPC classification number: H01L29/516 , H01L29/4908 , H01L29/78391 , H10B51/20 , H10B53/30 , H01L29/775
Abstract: Provided as an electronic device and an electronic apparatus including the electronic device. The electronic device includes a conductive material layer, a mixed material layer covering the conductive material layer, and an electrode layer covering the mixed material layer. The mixed material layer includes an orthorhombic crystal phase and a tetragonal crystal phase mixed therein such that a ferroelectric material and an anti-ferroelectric material coexist therein.
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25.
公开(公告)号:US20240162346A1
公开(公告)日:2024-05-16
申请号:US18495220
申请日:2023-10-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sanghyun JO , Jinseong HEO , Kihong KIM , Hyunjae LEE
CPC classification number: H01L29/78391 , H01L28/60 , H01L29/516 , H01L29/6684 , H10B12/31
Abstract: A field effect transistor includes a source region, a drain region, a channel between the source region and the drain region, a gate insulating layer configured to cover an upper surface of the channel, and a gate electrode configured to cover an upper surface of the gate insulating layer. The gate insulating layer includes a first region where a ferroelectric crystal structure is dominant and a second region where a non-ferroelectric structure is dominant. The gate electrode includes a first pattern region facing the first region of the gate insulating layer and a second pattern region facing the second region of the gate insulating layer.
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公开(公告)号:US20230116309A1
公开(公告)日:2023-04-13
申请号:US18060140
申请日:2022-11-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinseong HEO , Sangwook KIM , Yunseong LEE , Sanghyun JO , Hyangsook LEE
Abstract: Provided are an electronic device and a method of manufacturing the same. The electronic device includes a ferroelectric crystallization layer between a substrate and a gate electrode and a crystallization prevention layer between the substrate and the ferroelectric crystallization layer. The ferroelectric crystallization layer is at least partially crystallized and includes a dielectric material having ferroelectricity or anti-ferroelectricity. Also, the crystallization prevention layer prevents crystallization in the ferroelectric crystallization layer from being spread toward the substrate.
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公开(公告)号:US20230100991A1
公开(公告)日:2023-03-30
申请号:US18060372
申请日:2022-11-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinseong HEO , Sangwook KIM , Yunseong LEE , Sanghyun JO
Abstract: A domain switching device includes a channel region, a source region and a drain region connected to the channel region, a gate electrode isolated from contact with the channel region, an anti-ferroelectric layer between the channel region and the gate electrode, a conductive layer between the gate electrode and the anti-ferroelectric layer to contact the anti-ferroelectric layer, and a barrier layer between the anti-ferroelectric layer and the channel region.
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公开(公告)号:US20230068904A1
公开(公告)日:2023-03-02
申请号:US17876979
申请日:2022-07-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinseong HEO , Yunseong LEE , Hyangsook LEE , Sanghyun JO , Seunggeol NAM , Taehwan MOON , Hagyoul BAE , Eunha LEE , Junho LEE
Abstract: An electronic device includes: a substrate including a source, a drain, and a channel between the source and the drain; a gate electrode arranged above the substrate and facing the channel, the gate electrode being apart from the channel in a first direction; and a ferroelectric thin film structure between the channel and the gate electrode, the ferroelectric thin film structure including a first ferroelectric layer, a crystallization barrier layer including a dielectric material, and a second ferroelectric layer, which are sequentially arranged from the channel in the first direction. The average of sizes of crystal grains of the first ferroelectric layer may be less than or equal to the average of sizes of crystal grains of the second ferroelectric layer, and owing to small crystal grains, dispersion of performance may be improved.
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公开(公告)号:US20220393032A1
公开(公告)日:2022-12-08
申请号:US17888649
申请日:2022-08-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangwook KIM , Yunseong LEE , Sanghyun JO , Jinseong HEO
IPC: H01L29/78 , H01L27/088 , H01L29/51 , H01L21/8234 , H01L21/28 , H01L29/66
Abstract: An integrated circuit includes transistors respectively including channel layers in a substrate, source electrodes and drain electrodes respectively contacting both sides of the channel layers, gate electrodes on the channel layers, and ferroelectrics layers between the channel layers and the gate electrodes. Electrical characteristics of the ferroelectrics layers of at least two of the transistors are different. Accordingly, threshold voltages of the transistors are different from each other.
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公开(公告)号:US20220140104A1
公开(公告)日:2022-05-05
申请号:US17515969
申请日:2021-11-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinseong HEO , Yunseong LEE , Seunggeol NAM , Hagyoul BAE , Taehwan MOON , Sanghyun JO
Abstract: Provided is a ferroelectric semiconductor device including a ferroelectric layer and two or more electrode layers. The semiconductor device may include a first electrode layer and a second electrode layer which have thermal expansion coefficients less than the thermal expansion coefficient of the ferroelectric layer. The difference between the thermal expansion coefficients of the second electrode layer and the ferroelectric layer may be greater than the difference between the thermal expansion coefficients of the first electrode layer and the ferroelectric. The second electrode layer may have a thickness greater than the thickness of the first electrode layer.
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