公开(公告)号：US20170220498A1

公开(公告)日：2017-08-03

申请号：US15390570

申请日：2016-12-26

Applicant: Symbolic IO Corporation

Inventor： Brian M. Ignomirello

IPC: G06F13/36 ,  G06F13/42 ,  G06F13/40 ,  G06F21/85

CPC classification number: G06F13/36 ,  G06F13/4068 ,  G06F13/4282 ,  G06F21/85

Abstract: System and method to transferably store a system state of an electronic component, the system including a processor and a circuit module. The processor is configured to decompose the system state into a plurality of data vectors, and to map each of the plurality of data vectors to a respective bit marker. The circuit module is removably coupled to the electronic component, the circuit module including a memory and a transceiver. The transceiver is coupled to the memory and to a communication link between the memory and the processor, the transceiver operable to send and to receive data at a rate faster than 640 MBps. Data sent and received by the transceiver comprises bit markers mapped by the processor.

公开(公告)号：US09603251B1

公开(公告)日：2017-03-21

申请号：US15089053

申请日：2016-04-01

Applicant: Symbolic IO Corporation

Inventor： Brian M. Ignomirello

IPC: H05K7/14 ,  H05K7/18 ,  H05K1/18 ,  H05K3/36 ,  H05K7/20 ,  H05K5/00

CPC classification number: H05K7/1487

Abstract: A connector board for an electronic assembly, the connector board including a passive circuit board, mounted horizontally at an elevated position within the electronic assembly, a voltage distribution plane formed as a layer of the passive circuit board, a first electrical interface coupled to the voltage distribution plane, the first electrical interface used to supply a predetermined voltage to the voltage distribution plane, and a second electrical interface coupled to the voltage distribution plane, the second electrical interface used to draw the predetermined voltage from the voltage distribution plane.

公开(公告)号：USD768135S1

公开(公告)日：2016-10-04

申请号：US29554285

申请日：2016-02-10

Applicant: Symbolic IO Corporation

Designer： Brian M. Ignomirello

公开(公告)号：US09304703B1

公开(公告)日：2016-04-05

申请号：US14804175

申请日：2015-07-20

Applicant: Symbolic IO Corporation

Inventor： Brian M. Ignomirello

IPC: H03M7/00 ,  G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0614 ,  G06F3/0673 ,  H03M7/3082 ,  H03M7/55

Abstract: System and method to encode and decode raw data. The method to encode includes receiving a block of uncoded data, decomposing the block of uncoded data into a plurality of data vectors, mapping each of the plurality of data vectors to a bit marker; and storing the bit marker in a memory to produce an encoded representation of the uncoded data. Encoding may further include decomposing the block of uncoded data into default data and non-default data, and mapping only the non-default data. In some embodiments, bit markers may include a seed value and replication rule, or a fractalized pattern.

Abstract translation: 原始数据的编码和解码的系统和方法。 所述编码方法包括接收未编码数据块，将所述未编码数据块分解为多个数据矢量，将所述多个数据矢量中的每一个映射到比特标记; 以及将位标记存储在存储器中以产生未编码数据的编码表示。 编码还可以包括将未编码数据块分解为默认数据和非默认数据，并仅映射非默认数据。 在一些实施例中，位标记可以包括种子值和复制规则，或分形化图案。