公开(公告)号：US6010961A

公开(公告)日：2000-01-04

申请号：US31095

申请日：1998-02-26

Applicant: Yongjun Jeff Hu

Inventor： Yongjun Jeff Hu

IPC: H01L21/02 ,  H01L21/285 ,  H01L21/768 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/4763 ,  H01L21/44

CPC classification number: H01L27/10873 ,  H01L21/28518 ,  H01L21/76814 ,  H01L27/10888 ,  H01L28/40 ,  H01L27/10811

Abstract: Methods of establishing electrical communication with substrate node locations, methods of forming DRAM circuitry, and semiconductor assemblies are described. In one implementation, a contact opening is formed over a substrate node location with which electrical communication is desired. The contact opening has a base over which a refractory metal layer is formed. A refractory metal silicide layer is formed over the refractory metal layer, and the substrate is exposed to conditions effective to convert the refractory metal layer to a refractory metal silicide. In one embodiment, the refractory metal layer and the refractory metal silicide layer are chemical vapor deposited. In another embodiment, the refractory metal silicide layer comprises a silicide of the refractory metal layer. In a preferred implementation, the refractory metal layer comprises titanium and the refractory metal silicide layer comprises titanium silicide. In another implementation, a composite layer is formed over a substrate and comprises an underlying refractory metal and an overlying silicide layer. The composite layer is annealed to react the underlying metal with a silicon-comprising substrate and form a refractory metal silicide of the underlying refractory metal in contact with the overlying silicide layer. The invention can achieve reductions in silicon consumption in the diffusion regions and maintain low source/drain diode leakage.

Abstract translation: 描述了与衬底节点位置建立电气通信的方法，形成DRAM电路的方法和半导体组件。 在一个实施方案中，在需要电气通信的衬底节点位置上形成接触开口。 接触开口具有形成难熔金属层的基部。 在难熔金属层上形成难熔金属硅化物层，并将基板暴露于有效地将难熔金属层转化为难熔金属硅化物的条件下。 在一个实施例中，难熔金属层和难熔金属硅化物层是化学气相沉积的。 在另一个实施方案中，难熔金属硅化物层包含难熔金属层的硅化物。 在优选的实施方案中，难熔金属层包括钛，难熔金属硅化物层包含硅化钛。 在另一个实施方案中，复合层形成在衬底上并且包括下面的难熔金属和上覆的硅化物层。 将复合层退火以使底层金属与含硅衬底反应，并形成与覆盖的硅化物层接触的下面的难熔金属的难熔金属硅化物。 本发明可以实现扩散区域中硅消耗的减少并且保持低的源极/漏极二极管泄漏。

公开(公告)号：US20160093688A1

公开(公告)日：2016-03-31

申请号：US14498640

申请日：2014-09-26

Applicant: John Mark Meldrim ,  Yushi Hu ,  Yongjun Jeff Hu ,  Everett Allen McTeer

Inventor： John Mark Meldrim ,  Yushi Hu ,  Yongjun Jeff Hu ,  Everett Allen McTeer

IPC: H01L29/04 ,  H01L27/105

CPC classification number: H01L27/0688 ,  H01L29/7827

Abstract: A multilayer source provides charge carriers to a multitier channel connector. The source includes a metal silicide layer on a substrate and a metal nitride layer between the metal silicide layer and the channel. The metal silicide and the metal nitride are processed without an intervening oxide layer between them. In one embodiment, the source further includes a silicon layer between the metal nitride layer and the channel. The silicon layer can also be processed without an intervening oxide layer. Thus, the source does not have an intervening oxide layer from the substrate to the channel.

Abstract translation: 多层光源将电荷载体提供给多层通道连接器。 源包括衬底上的金属硅化物层和金属硅化物层和沟道之间的金属氮化物层。 金属硅化物和金属氮化物在它们之间没有中间的氧化物层被加工。 在一个实施例中，源还包括在金属氮化物层和沟道之间的硅层。 硅层也可以在没有中间氧化物层的情况下被加工。 因此，源不具有从衬底到通道的中间氧化物层。

公开(公告)号：US08227875B2

公开(公告)日：2012-07-24

申请号：US12797404

申请日：2010-06-09

Applicant: Yongjun Jeff Hu ,  Allen McTeer ,  Naga Chandrasekaran

Inventor： Yongjun Jeff Hu ,  Allen McTeer ,  Naga Chandrasekaran

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: H01L21/28247 ,  H01L21/31654 ,  H01L21/76825 ,  H01L29/78

Abstract: Methods for selectively oxidizing a semiconductor structure include generating a gas cluster ion beam comprising an oxidizing source gas, directing the gas cluster ion beam to a region of a substrate adjacent a conductive line and exposing the region to the gas cluster ion beam including an oxidizing matter. Utilizing the gas cluster ion beam enables selective oxidation of a targeted region at temperatures substantially lower than those of typical oxidation processes thus, reducing or eliminating oxidation of the conductive line. Semiconductor devices including transistors formed using such methods are also disclosed.

Abstract translation: 用于选择性氧化半导体结构的方法包括产生包含氧化源气体的气体团簇离子束，将气体团簇离子束引导到与导电线相邻的衬底的区域，并将该区域暴露于包含氧化物质的气体团簇离子束 。 利用气体簇离子束使得能够以比典型的氧化过程低的温度选择性地氧化目标区域，从而减少或消除导电线的氧化。 还公开了包括使用这种方法形成的晶体管的半导体器件。

公开(公告)号：US20120154919A1

公开(公告)日：2012-06-21

申请号：US12967733

申请日：2010-12-14

Applicant: Yongjun Jeff Hu ,  Allen McTeer ,  Lijing Gou

Inventor： Yongjun Jeff Hu ,  Allen McTeer ,  Lijing Gou

IPC: G02B27/00 ,  B28B11/08 ,  C23F1/00 ,  B82Y20/00

CPC classification number: G02B5/201 ,  B82Y20/00 ,  G02B5/003 ,  Y10S977/707 ,  Y10S977/762 ,  Y10S977/773 ,  Y10S977/834 ,  Y10S977/954

Abstract: Photonic nanostructures, light absorbing apparatuses, and devices are provided. The photonic nanostructures include a plurality of photonic nanobars configured to collectively absorb light over an excitation wavelength range. At least two of the photonic nanobars of the plurality have lengths that are different from one another. Each photonic nanobar of the plurality has a substantially small width and a substantially small height relative to the different lengths. A method for forming such may comprise forming a plurality of first photonic nanobars comprising a width and a height that are smaller than a length of the plurality of first photonic nanobars, and forming a plurality of second photonic nanobars comprising a width and a height that are smaller than a length of the second photonic nanobar, wherein the lengths of the plurality of first photonic nanobars and the lengths of the plurality of second photonic nanobars are different from one another.

Abstract translation: 提供光子纳米结构，光吸收装置和装置。 光子纳米结构包括配置成在激发波长范围内共同吸收光的多个光子纳米结构。 多个光子纳米棒中的至少两个具有彼此不同的长度。 多个的每个光子纳米棒相对于不同的长度具有基本上小的宽度和基本上小的高度。 用于形成其的方法可以包括形成多个第一光子纳米条，其包括小于多个第一光子纳米条的长度的宽度和高度，以及形成多个第二光子纳米条，其包括宽度和高度 小于第二光子纳米棒的长度，其中多个第一光子纳米棒的长度和多个第二光子纳米棒的长度彼此不同。

公开(公告)号：US07999330B2

公开(公告)日：2011-08-16

申请号：US11167011

申请日：2005-06-24

Applicant: Yongjun Jeff Hu

Inventor： Yongjun Jeff Hu

IPC: H01L21/8242

CPC classification number: H01L27/10855 ,  H01L21/28568 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/7687 ,  H01L21/76873 ,  H01L21/76879 ,  H01L23/485 ,  H01L23/53238 ,  H01L28/65 ,  H01L28/75 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention includes methods of utilizing compositions containing iridium and tantalum in semiconductor constructions, and includes semiconductor constructions comprising compositions containing iridium and tantalum. The compositions containing iridium and tantalum can be utilized as barrier materials, and in some aspects can be utilized as barriers to copper diffusion.

Abstract translation: 本发明包括在半导体结构中使用含有铱和钽的组合物的方法，并且包括包含含有铱和钽的组合物的半导体构造。 含有铱和钽的组合物可用作阻挡材料，并且在一些方面可用作铜扩散的阻挡层。

公开(公告)号：US07989340B2

公开(公告)日：2011-08-02

申请号：US12244692

申请日：2008-10-02

Applicant: Yongjun Jeff Hu

Inventor： Yongjun Jeff Hu

IPC: H01L29/45 ,  H01L21/28

CPC classification number: H01L29/665 ,  H01L21/28518

Abstract: The invention included to methods of forming CoSi2, methods of forming field effect transistors, and methods of forming conductive contacts. In one implementation, a method of forming CoSi2 includes forming a substantially amorphous layer comprising MSix over a silicon-containing substrate, where “M” comprises at least some metal other than cobalt. A layer comprising cobalt is deposited over the substantially amorphous MSix-comprising layer. The substrate is annealed effective to diffuse cobalt of the cobalt-comprising layer through the substantially amorphous MSix-comprising layer and combine with silicon of the silicon-containing substrate to form CoSi2 beneath the substantially amorphous MSix-comprising layer. Other aspects and implementations are contemplated.

Abstract translation: 本发明包括形成CoSi 2的方法，形成场效应晶体管的方法以及形成导电触点的方法。 在一个实施方案中，形成CoSi 2的方法包括在含硅衬底上形成包含MSix的基本非晶层，其中“M”至少包括除钴以外的一些金属。 包含钴的层沉积在基本上无定形的含MSix的层上。 将衬底退火有效地将含钴层的钴扩散通过基本上无定形的含MSix层并与含硅衬底的硅结合，以在基本上无定形的含MSix层下形成CoSi 2。 考虑了其他方面和实现。

公开(公告)号：US07867844B2

公开(公告)日：2011-01-11

申请号：US12128404

申请日：2008-05-28

Applicant: Yongjun Jeff Hu

Inventor： Yongjun Jeff Hu

IPC: H01L21/336

CPC classification number: H01L29/66833 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/1157 ,  H01L29/4234 ,  H01L29/66825 ,  H01L29/792

Abstract: Some embodiments include methods of forming charge storage transistor gates and standard FET gates in which common processing is utilized for fabrication of at least some portions of the different types of gates. FET and charge storage transistor gate stacks may be formed. The gate stacks may each include a gate material, an insulative material, and a sacrificial material. The sacrificial material is removed from the FET and charge storage transistor gate stacks. The insulative material of the FET gate stacks is etched through. A conductive material is formed over the FET gate stacks and over the charge storage transistor gate stacks. The conductive material physically contacts the gate material of the FET gate stacks, and is separated from the gate material of the charge storage transistor gate stacks by the insulative material remaining in the charge storage transistor gate stacks. Some embodiments include gate structures.

Abstract translation: 一些实施例包括形成电荷存储晶体管栅极和标准FET栅极的方法，其中公共处理用于制造不同类型栅极的至少一些部分。 可以形成FET和电荷存储晶体管栅极堆叠。 栅极堆叠可以各自包括栅极材料，绝缘材料和牺牲材料。 牺牲材料从FET中去除并对存储晶体管栅极堆叠进行充电。 FET栅极堆叠的绝缘材料被蚀刻通过。 导电材料形成在FET栅叠层上方和电荷存储晶体管栅堆上。 导电材料物理地接触FET栅极堆叠的栅极材料，并且通过残留在电荷存储晶体管栅极堆叠中的绝缘材料与电荷存储晶体管栅极堆叠的栅极材料分离。 一些实施例包括门结构。

公开(公告)号：US20080135903A1

公开(公告)日：2008-06-12

申请号：US11636192

申请日：2006-12-08

Applicant: Yongjun Jeff Hu

Inventor： Yongjun Jeff Hu

IPC: H01L31/062 ,  H01L29/78 ,  H01L21/3205

CPC classification number: H01L29/4975 ,  H01L21/28273 ,  H01L27/105 ,  H01L27/10805 ,  H01L27/10891 ,  H01L27/115 ,  H01L27/11521

Abstract: A method for fabricating a transistor gate with a conductive element that includes cobalt silicide includes use of a sacrificial material as a place-holder between sidewall spacers of the transistor gate until after high temperature processes, such as the fabrication of raised source and drain regions, have been completed. In addition, semiconductor devices (e.g., DRAM devices and NAND flash memory devices) with transistor gates that include cobalt silicide in their conductive elements are also disclosed, as are transistors with raised source and drain regions and cobalt silicide in the transistor gates thereof. Intermediate semiconductor device structures that include transistor gates with sacrificial material or a gap between upper portions of sidewall spacers are also disclosed.

Abstract translation: 一种制造具有包括硅化钴的导电元件的晶体管栅极的方法包括使用牺牲材料作为晶体管栅极的侧壁间隔物之间​​的位置保持器，直到高温处理（例如升高的源极和漏极区域的制造） 已经完成 此外，还公开了具有在其导电元件中包括硅化钴的晶体管栅极的半导体器件（例如，DRAM器件和NAND闪存器件），晶体管的晶体管具有在其晶体管栅极中具有升高的源极和漏极区域以及硅化钴的晶体管。 还公开了包括具有牺牲材料的晶体管栅极或侧壁间隔物的上部之间的间隙的中间半导体器件结构。

公开(公告)号：US07282443B2

公开(公告)日：2007-10-16

申请号：US10609282

申请日：2003-06-26

Applicant: Yongjun Jeff Hu

Inventor： Yongjun Jeff Hu

IPC: H01L21/44

CPC classification number: H01L21/28052 ,  H01L21/28061 ,  H01L27/10882 ,  H01L29/7833

Abstract: The invention includes methods of forming metal silicide having bulk resistance of less than 30 micro-ohms-centimeter. The metal of the metal silicide can be selected from Groups 3, 4, 8, 9 and 10 of the periodic table, with an exemplary metal being titanium. An exemplary method includes forming a titanium-containing layer directly against tantalum silicide. After the titanium-containing layer is formed directly against the tantalum silicide, titanium of the titanium-containing layer is converted to titanium silicide. Constructions formed in accordance with methodology of the present invention can be incorporated into circuitry associated with semiconductor devices, such as, for example, wordlines and bitlines.

Abstract translation: 本发明包括形成体积电阻小于30微欧姆·厘米的金属硅化物的方法。 金属硅化物的金属可以选自周期表的第3,4,8,9和10族，其中示例性的金属是钛。 一种示例性的方法包括直接与硅化钽形成含钛层。 在直接与硅化钽形成含钛层之后，将含钛层的钛转化为硅化钛。 根据本发明的方法形成的结构可以结合到与半导体器件相关的电路中，例如字线和位线。

公开(公告)号：US07256138B2

公开(公告)日：2007-08-14

申请号：US10881503

申请日：2004-06-29

Applicant: Whonchee Lee ,  Yongjun Jeff Hu

Inventor： Whonchee Lee ,  Yongjun Jeff Hu

IPC: H01L21/302 ,  H01L21/461

CPC classification number: C23F1/28 ,  H01L21/32134 ,  H01L21/76895

Abstract: An etching method for use in integrated circuit fabrication includes providing a metal nitride layer on a substrate assembly, providing regions of cobalt silicide on first portions of the metal nitride layer, and providing regions of cobalt on second portions of the metal nitride layer. The regions of cobalt and the second portions of the metal nitride layer are removed with at least one solution including a mineral acid and a peroxide. The mineral acid may be selected from the group including HCl, H2SO4, H3PO4, HNO3, and dilute HF (preferably the mineral acid is HCl) and the peroxide may be hydrogen peroxide. Further, the removal of the regions of cobalt and the second portions of the metal nitride layer may include a one step process or a two step process. In the one step process, the regions of cobalt and the second portions of the metal nitride layer are removed with a single solution including the mineral acid and the peroxide. In the two step process, the regions of cobalt are removed with a first solution containing a mineral acid and a peroxide and the second portions of the metal nitride layer are removed with a second solution containing a peroxide. An etching composition including a mineral acid and a peroxide, preferably, HCl and hydrogen peroxide, is also described. The etching methods and compositions may be used in forming structures such as word lines, gate electrodes, local interconnects, etc.

Abstract translation: 用于集成电路制造的蚀刻方法包括在衬底组件上提供金属氮化物层，在金属氮化物层的第一部分上提供钴硅化物的区域，以及在金属氮化物层的第二部分上提供钴区域。 用至少一种包含无机酸和过氧化物的溶液除去钴的区域和金属氮化物层的第二部分。 无机酸可以选自HCl，H 2 SO 4，H 3 PO 4，SO 3， HNO 3，稀释HF（优选无机酸为HCl），过氧化物可以是过氧化氢。 此外，去除钴的区域和金属氮化物层的第二部分可以包括一步法或两步法。 在一步法中，用包含无机酸和过氧化物的单一溶液除去钴的区域和金属氮化物层的第二部分。 在两步法中，用含有无机酸和过氧化物的第一溶液除去钴的区域，并用含有过氧化物的第二溶液除去金属氮化物层的第二部分。 还描述了包含无机酸和过氧化物，优选HCl和过氧化氢的蚀刻组合物。 蚀刻方法和组合物可以用于形成诸如字线，栅电极，局部互连等的结构。