Abstract:
An automated gateway system for interfacing a first message handling system with a second message handling system. In the preferred embodiment, the automated gateway of the present invention allows the exchange between a formal system such as the United States Department of Defense AUTODIN message handling system and an informal system such as the International Standards Organization X.400 message handling system. Messages received from a first one of the message handling systems are processed and sent to a message routing unit which determines if the message should be sent to the first or second message handling system. If the second message handling system address exists, an automated gateway user agent validates the address and creates a second message handling system envelope around the entire message and submits it to the second message handling system.
Abstract:
A personal computer or workstation on a network includes a quick-choice cache into which are collected the names and aliases of networked devices or services that are expected to be most routinely used by a particular user. The cache is initialized to contain the names and aliases of devices within a network zone assigned to the workstation. This collection of names/aliases is expanded each time the user makes a connection to a device not previously listed. The cache drives a graphic user interface (GUI) that shows the user what service categories are available within the cache, and then when a service category is selected, what specific devices are included within the cache under that service category. The GUI permits quick logical connection to devices whose aliases are stored in the user's cache. A connection map later graphically shows the user what connections he or she has made.
Abstract:
A token ring concentrator port circuit including an upstream data node, a downstream data node, a station receiver node, a station transmitter node, a path switch configured to selectively either connect the upstream data node directly to the downstream data node or connect the station receiver and transmitter nodes between the upstream and downstream data nodes, and a timing recovery circuit including a phase locked loop that derives a recovered clock from data from a station connected to the station receiver and transmitter nodes and reclocks the data with the recovered clock before transmitting the data to the downstream data node, the phase locked loop including a constant gain phase detector, the timing recovery circuit including a frequency limiting circuit, the port circuit components being implemented in a common integrated circuit.
Abstract:
A circuit board capable of live-insertion or hot-swapping into a live chassis backplane. The circuit board is provided with a power control circuitry for gracefully ramping up board power after insertion, or gracefully removing power just prior to physical removal of a circuit board from the board slot. A pair of ejector levers are provided on each side of the circuit board. A push button switch is provided proximate one ear thereof and is selectively opened or closed depending upon the position of an ejector cover which can be secured thereover in an interlocking relationship. Upon retraction of the extractor cover, the switch is opened, and the converse applies. Power MOSFETs are provided between the card edge and the board power busses which are gracefully turned on and off as a function of the switch position. A high-side gate driver provides an increased bias voltage, which bias voltage is communicated through the closed switch to the gates of the MOSFETs. An RC network is coupled to the MOSFET gate to determine the time constant at which bias voltage will be ramped up or ramped down to correspondingly ramp power up or down to the circuit board power busses. A power supply monitor circuit is also provided for automatically resetting the board upon a power up condition.
Abstract:
A multi-domain, distributed arbitration system, and a method performed by a plurality of arbiters to control arbitration of requests for a multiprocessor system bus. The requests are generated by a plurality of nodes coupled to the multiprocessor system bus. The requests are presented on a plurality of arbitration request lines. Each node comprises one of the arbiters such that each arbiter is associated with a corresponding node. A plurality of domains are created by the arbiters based on a bit-wise combination of the requests on the arbitration lines. A priority is assigned to each domain relative to the other domains. Each arbiter monitors the requests on the arbitration request lines and generates an i.sub.-- win result that indicates whether or not the associated node is an overall arbitration winner if a request from that node is pending. In addition, the arbiters generate a who.sub.-- won result that indicates which node was the overall arbitration winner according to the assigned priorities.
Abstract:
A Peripheral Component Interconnect (PCI) bus provides component level interconnection of processors, peripherals and memories. A bus protocol mechanism includes a Special Cycle command for defining "soft", i.e., configurable, transaction types for use between devices communicating on the PCI bus. Using the Special Cycle command, two or more devices attached to the bus can establish a device-specific logical signalling channel that expands upon, but does not violate, the PCI specification. This device-specific signalling channel provides logical sideband signaling between PCI bus devices, when such signaling does not require the precise timing or synchronization of physical signals. This allows the systems designer to define necessary sideband signalling without requiring any additional pins on the PCI bus.
Abstract:
The present invention is a system for discovering the topology of a network. A source node may issue ping symbols that are addressed to specific, potentially existing, target nodes. An echo symbol is always returned. The type of ping symbol determines over how many bridges the ping symbol may propagate. The type of echo symbol identifies if the addressed node is a leaf node, a non-existing node, an operating bridge node, or a non-operating bridge node. The responsibility for transforming pings into echoes belongs only to the bridge nodes. A sequence of issued ping symbols and returned echo symbols allows a source node to discover the topology of the entire network.
Abstract:
Self contained radio transmitting modules are mounted on power conductors at various places along electrical transmission lines. The modules are capable of measuring current, voltage, frequency and power factor (or the Fourier components thereof), the temperature of the conductor and the temperature of the ambient air. Up to fifteen modules may transmit on a single channel to a single local receiver. Each module transmits at intervals which are an integral number. The intervals between transmissions of all modules do not have a common factor and the average interval is the desired transmission rate.
Abstract:
A toroidal sensor module having a metallic outer skin and mounting means for installation upon and removal from an energized power conductor providing synchronized measurements of electrical parameters. In one embodiment the module is adapted to measure the values of voltage, current and phase angle of the conductor upon which it is mounted, and to communicate data representing such values to a ground station in the vicinity of the sensor module. The voltage and current are sensed simultaneously to provide time-synchronized readings with respect to voltage zero crossings from which the phase relationship is determined. The metallic skin of the module may be either capacitively or electrically coupled to the conductor for purposes of making conductor voltage measurements. The toroidal housing is divided into two, mutually insulated sections to prevent an electrical short circuit loop on any peripheral path on the housing extending through both sections, thereby allowing the electromagnetic field of the conductor to be coupled to sensing elements within the housing.
Abstract:
A long-life cesium lamp is disposed within an evacuable outer envelope surrounding a cesium lamp arc tube with their respective surfaces spaced a fixed distance apart so that a heat-transferring gas, such as helium, is disposed between the arc tube and the wall of the outer envelope. Furthermore, means are provided for cooling the outer envelope, such as by surrounding it with a water jacket. The resulting lamp system is capable of operating at higher levels of average lamp power and arc tube wall loading (watts/cm.sup.2) without causing too low a cesium pressure, as would happen if one directly water-cooled the alumina arc tube, and without causing too high an alumina arc tube temperature, as would happen if one merely evacuated the outer envelope. The lamp system of the present invention is also employed in a housing in which the lamps are disposed along the foci of a dual-elliptical cavity so that light emissions from the lamps are focussed upon a slab of lasing material, so as to form, for example, a neodymium-YAG laser.
Abstract translation:长寿命的铯灯设置在围绕铯灯电弧管的可抽出的外壳内,其各自的表面间隔开固定的距离,使得诸如氦的传热气体设置在电弧管和壁之间 外壳。 此外,提供用于冷却外壳的装置,例如通过用水套围住外壳。 所产生的灯系统能够以更高水平的平均灯功率和电弧管壁负载(瓦特/ cm 2)运行,而不会导致太低的铯压力,如将直接水冷的氧化铝电弧管发生的那样,并且不会引起 太高的氧化铝弧管温度,如果只是将外壳抽真空则会发生。 本发明的灯系统也被用于沿着双椭圆形腔的焦点设置灯的壳体,使得来自灯的光发射聚焦在激光材料板上,以形成用于 例如钕-YAG激光器。