公开(公告)号：US20250085794A1

公开(公告)日：2025-03-13

申请号：US18752451

申请日：2024-06-24

Applicant: STMicroelectronics International N.V.

Inventor： Bowei Chen

IPC: G06F3/0354 ,  G06F3/044 ,  G06F3/04883

Abstract: A display processing method includes collecting raw data of a contact with a stylus on a touch screen by scanning the touch screen with a touch controller. The method further includes normalizing the raw data to determine normalized data, and receiving related information associated with the contact from the stylus. And the method further includes transmitting the related information associated with the contact and transmitting the normalized data.

公开(公告)号：US20250085314A1

公开(公告)日：2025-03-13

申请号：US18367044

申请日：2023-09-12

Applicant: STMicroelectronics International N.V.

Inventor： Francesco BORGIOLI ,  Roberto Pio BAORDA ,  Paolo ANGELINI ,  Danilo Karim KADDOURI ,  Lorenzo ERCOLINI

IPC: G01R15/20 ,  G01R19/10

Abstract: Disclosed herein is a system for measuring current, including an input inductor and a self-test inductor through which respective input and self-test currents flow. A Hall-effect sensor circuit senses magnetic fields around these inductors, producing differential voltage outputs. These outputs are received by an input and self-test extraction circuit, which alternatingly outputs differential voltages representative of the magnetic fields around the inductors. Amplification of these differential voltages is performed by an amplifier. Sampling of the amplified differential voltages is performed by two sample/hold circuits, each designated for a specific inductor's magnetic field. An integrator circuit adjusts a voltage for the Hall effect sensor circuit, causing the gain applied to the sampled differential voltage to remain consistent and uninfluenced by the sensitivity of the Hall effect sensor circuit.

公开(公告)号：US12249644B2

公开(公告)日：2025-03-11

申请号：US17058117

申请日：2019-05-07

Applicant: STMicroelectronics International N.V.

Inventor： Matthieu Nongaillard ,  Thomas Oheix

IPC: H01L29/778 ,  H01L29/10 ,  H01L29/20

Abstract: An enhancement-mode high-electron-mobility transistor comprises a structure including a stack made of III-V semiconductor materials defining an interface and capable of forming a conduction layer in the form of a two-dimensional electron gas layer; a source electrode and a drain electrode forming an electrical contact with the conduction layer; and a gate electrode arranged on top of the structure, between the source electrode and the drain electrode. The structure comprises a bar that is arranged below the gate electrode and passes through the interface of the stack. The bar comprises two semiconductor portions exhibiting opposite types of doping, defining a p-n junction in proximity to the interface.

公开(公告)号：US20250081644A1

公开(公告)日：2025-03-06

申请号：US18814251

申请日：2024-08-23

Applicant: STMicroelectronics International N.V.

Inventor： Tarek LULE

IPC: H01L27/146 ,  H04N25/77 ,  H04N25/78

Abstract: The present disclosure relates to an image sensor comprising an array of pixels arranged in first rows and in first columns. The pixels are arranged in groups of N*N pixels, with N an integer equal to or higher than 2. In each group, the pixels of the group are distributed into one or more sub-groups of a plurality of pixels. Each pixel comprises: a photosensitive element, a first node coupled to the photosensitive element, a second node common to all pixels of a same sub-group, and coupled to a first potential, a first transistor coupling the first and second nodes to each other, a second source-follower transistor having a gate connected to the first node, and a third transistor coupling the source of the third transistor to a reading line.

公开(公告)号：US20250081494A1

公开(公告)日：2025-03-06

申请号：US18458877

申请日：2023-08-30

Applicant: STMicroelectronics International N.V.

Inventor： Arnaud YVON

IPC: H01L29/66 ,  H01L29/20 ,  H01L29/778

Abstract: A process forms a high electron mobility transistor (HEMT) device with a recessed gate without damaging sensitive areas of the HEMT device. The process utilizes a first epitaxial growth process to grow a first set of layers of the HEMT. The epitaxial growth process is then stopped and a passivation layer is formed on the first set of layers. The passivation layer is then patterned to provide a passivation structure at a desired location of the recessed gate electrode. The channel layer and one or more barrier layers are then formed in a second epitaxial growth process in the presence of the passivation structure. The result is that the channel layer and the barrier layer growth around the passivation structure. The passivation structure is then removed, effectively leaving a recess in the channel layer. The gate electrode is then formed in the recess.

公开(公告)号：US20250080060A1

公开(公告)日：2025-03-06

申请号：US18240091

申请日：2023-08-30

Applicant: STMICROELECTRONICS INTERNATIONAL N.V. ,  CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE ,  INSTITUT POLYTECHNIQUE DE BORDEAUX ,  UNIVERSITE DE BORDEAUX

Inventor： Sebastien SADLO ,  Nathalie DELTIMPLE ,  Andreia CATHELIN

IPC: H03F3/04 ,  H03F1/56

Abstract: An amplifier including a first amplification stage unit that includes a first transistor configured to modulate a first transistor threshold voltage using a first control voltage on a body of the first transistor, and a first direct current permitting feedback loop electrically coupling a drain of the first transistor with a gate of the first transistor. The amplifier may include a second amplification stage unit that includes a second transistor configured to modulate a second transistor threshold voltage using a second control voltage on a body of the second transistor, and a second direct current permitting feedback loop electrically coupling a drain of the second transistor with a gate of the second transistor.

公开(公告)号：US20250076473A1

公开(公告)日：2025-03-06

申请号：US18239558

申请日：2023-08-29

Applicant: STMicroelectronics International N.V.

Inventor： John Kevin MOORE

IPC: G01S7/4865 ,  G01S7/4863 ,  G01S17/10 ,  G01S17/894

Abstract: A time-of-flight (TOF) sensor includes a timing generator generating a timing reference, a first array of TOF-related components including rows of TOF-related components, with each row receiving the timing reference, and a dummy row of TOF-related components. The TOF sensor also includes a second array of TOF-related components including rows of TOF-related components, with each row receiving the timing reference, and a dummy row of TOF-related components. A first path delivers the timing reference to the rows of the first array, the first path passing from the timing generator, through the dummy row of TOF-related components in the second array, to the first array of TOF-related components. A second path delivers the timing reference to the rows of the second array, the second path passing from the timing generator, through the dummy row of TOF-related components in the first array, to the second array of TOF-related components.

公开(公告)号：US20250067803A1

公开(公告)日：2025-02-27

申请号：US18453045

申请日：2023-08-21

Applicant: STMicroelectronics International N.V.

Inventor： Sandeep Jain ,  Shalini Pathak

IPC: G01R31/3177

Abstract: According to an embodiment, a first aspect relates to a method for testing a scan chain. The method includes segmenting the scan chain into two or more segments; adding a respective multiplexer at end points of each segment, wherein each pair of sequential segment shares a common multiplexer in between; asserting a select signal at a select terminal of the multiplexers such that a relative position of the two or more segments is rearranged positionally in a rearranged scan chain; generating a test pattern to be communicated to an input terminal of the rearranged scan chain and observing a test result at an output of the rearranged scan chain; and determining a fault condition in the rearranged scan chain based on comparing the test result and an expected result.

公开(公告)号：US20250055272A1

公开(公告)日：2025-02-13

申请号：US18446956

申请日：2023-08-09

Applicant: STMicroelectronics International N.V.

Inventor： Andrea SPAMPINATO ,  Gianluigi FORTE

IPC: H02H7/122 ,  H02M7/5395

Abstract: Methods, systems, and devices for fault detection at pulse width modulation converters are described. An example of one such method includes receiving a first signal including a first pulse width modulation waveform. The first signal may be for controlling a switching component via a first node. A second signal may be received. The second signal may include a second pulse width modulation waveform. The second signal may be output by a second node of the switching component. One or more operations may be performed to compare the second signal with one or more other signals or one or more thresholds. A third signal may be transmitted based at least in part on the comparison of the second signal with the one or more other signals or thresholds. The third signal may indicate whether a fault has occurred at the switching component.

公开(公告)号：US20250053807A1

公开(公告)日：2025-02-13

申请号：US18779807

申请日：2024-07-22

Applicant: STMICROELECTRONICS INTERNATIONAL N.V. ,  STMICROELECTRONICS S.R.L

Inventor： Danilo Pietro PAU ,  Surinder Pal SINGH ,  Fabrizio Maria Aymone

IPC: G06N3/08 ,  G06N5/046

Abstract: The present disclosure relates to a method of training a neural network using a circuit comprising a memory and a processing device, an exemplary method comprising: performing a first forward inference pass through the neural network based on input features to generate first activations, and generating an error based on a target value, and storing the error to the memory; and performing, for each layer of the neural network: a modulated forward inference pass; before, during or after the modulated forward inference pass, a second forward inference pass based on the input features to regenerate one or more first activations; and updating one or more weights in the neural network based on the modulated activations and the one or more regenerated first activations.