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公开(公告)号：US20240202377A1
公开(公告)日：2024-06-20
申请号：US18066948
申请日：2022-12-15
Applicant: X Development LLC
Inventor： Aaditya Chandrasekhar , Ian Williamson
IPC: G06F30/10
CPC classification number: G06F30/10
Abstract: In some embodiments, a computer-implemented method for designing a physical device is provided. A computing system generates an initial design based on a design specification. The initial design includes a list of geometric shape primitives. The computing system determines a set of structural parameters using the list of geometric shape primitives. The computing system simulates performance of the initial design using the set of structural parameters to determine a performance loss value. The computing system updates at least one of a size or a location of at least one of the geometric shape primitives using a gradient of the performance loss value.
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公开(公告)号：US20240201523A1
公开(公告)日：2024-06-20
申请号：US18162106
申请日：2023-01-31
Applicant: X Development LLC
Inventor： Simon Bilodeau
CPC classification number: G02F1/025 , H04B10/6165 , G02F2203/50
Abstract: Aspects of the disclosure provide phase shifters as well as systems and methods in which those phase shifters may be utilized. For instance, a system may include a first communications terminal. The first optical communications terminal may include an optical phased array (OPA) architecture including a plurality of phase shifters configured to receive an optical communications beam from a second communications terminal. The plurality of phase shifters includes a first phase shifter consisting of silicon having a slab-contacted NPN junction scheme geometry. The first phase shifter may have a PN junction distance from waveguide center within a range 100 nm to 2 μm, inclusive, and a waveguide core width dimension within a range 500 nm to 2 μm, inclusive. The system may also include the second optical communications terminal.
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公开(公告)号：US20240195500A1
公开(公告)日：2024-06-13
申请号：US18298532
申请日：2023-04-11
Applicant: X Development LLC
Inventor： Ondrej Cierny , Paul Epp , Jean-Laurent Plateau , Bruce Moision , Joaquin Matres Abril , Devin Brinkley
IPC: H04B10/11
CPC classification number: H04B10/11
Abstract: Aspects of the disclosure provide a method of adjusting a plurality of phase shifters of an OPA. The method may include identifying, by one or more processors, one or more first subsets of phase shifters of the plurality of phase shifters based on an orthogonal set of functions; performing, by the one or more processors, one or more first dithers on the one or more first subsets of phase shifters of the plurality of phase shifters using one or more first frequencies of a predetermined set of frequencies; determining, by the one or more processors, one or more first corrections based on a first power output of the OPA resulting from the one or more first dithers; and adjusting, by the one or more processors, the one or more first subsets using the one or more first corrections, the adjustment resulting in a first set of corrected phase shifter values.
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公开(公告)号：US20240192487A1
公开(公告)日：2024-06-13
申请号：US18234197
申请日：2023-08-15
Applicant: X Development LLC
Inventor： Paul Epp , Andrei Kazmierski , Devin Brinkley
IPC: G02B27/00 , G02B5/18 , G02F1/29 , H04B10/112
CPC classification number: G02B27/0087 , G02B5/1885 , G02F1/292 , H04B10/1123
Abstract: Aspects of the disclosure provide a system including a first optical communications terminal comprising. The first optical communications terminal may include a common aperture for transmitting signals and receiving signals. The first optical communications terminal may also include an optical phased array (OPA) architecture including a micro-lens array including a plurality of micro-lenses. Each micro-lens of the plurality of micro-lenses may have a plurality of concentric grooves arranged on a respective surface of that micro-lens. The OPA architecture may be configured for bidirectional communication with a second optical communications terminal.
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公开(公告)号：US20240184148A1
公开(公告)日：2024-06-06
申请号：US17970141
申请日：2022-10-20
Applicant: X Development LLC
CPC classification number: G02F1/0123 , G02B6/1225 , G02F1/0018 , G02F1/0136 , G02B2006/12142
Abstract: An optical modulator includes a modulation region, an input port, an output port, and a modulation actuator. The modulation region includes an inhomogeneous arrangement of two or more different materials having different refractive indexes to structure the modulation region to manipulate one or more optical properties of an optical carrier wave in response to a modulation bias. The input port is optically coupled to the modulation region to inject the optical carrier wave into the modulation region. The modulation actuator is disposed proximate to the modulation region and adapted to apply the modulation bias to the modulation region to generate a modulated wave. The modulation bias adjusts at least one of the different refractive indexes of the inhomogeneous arrangement to provide variable control of the one or more optical properties of the optical carrier wave. The output port is optically coupled to the modulation region to receive the modulated wave.
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Patent Agency Ranking
公开(公告)号：US20240176943A1
公开(公告)日：2024-05-30
申请号：US18235437
申请日：2023-08-18
Applicant: X DEVELOPMENT LLC
Inventor： Xiaoqing Xu , Herman Schmit , Alessandro Tempia Calvino
IPC: G06F30/398 , G06F30/31
CPC classification number: G06F30/398 , G06F30/31
Abstract: The technology involves the auto-creation of custom standard cells. The process may include receiving specifications for implementing a set of functionalities in an integrated circuit to be fabricated. From this, the system identifies which cells are required to implement the set of functionalities. The identified cells are evaluated against a standard cell library stored in memory to determine which of the cells are not in the standard cell library. The system automatically creates the cells that are not in the standard cell library. The system can then utilize the automatically created cells to fabricate the integrated circuit. Benefits of such an approach include reduced design, development time and improved design quality of results. The resulting new cells may have fewer transistors, less area/power and improved performance than a standard cell from a preexisting library, especially since such standard cells would not necessarily be configurable to perform the desired functions.
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公开(公告)号：US20240172042A1
公开(公告)日：2024-05-23
申请号：US17988865
申请日：2022-11-17
Applicant: X Development LLC
Inventor： Brion Koprowski , Dean Kawaguchi
CPC classification number: H04W28/06 , G01S1/042 , G06K19/0723 , H04W24/08 , G01K1/024
Abstract: A tracking tag of a tracking system configured to receive, by one or more processors of the tracking tag, a first measurement collected by one or more sensors of the tracking tag; determine, by the one or more processors, a degree of similarity between the first measurement and a critical value; compare, by the one or more processors, the degree of similarity between the first measurement and the critical value to a first threshold value; modify, by the one or more processors, an initial time interval based on the comparison of the degree of similarity between the first measurement and the critical value to the first threshold to determine a modified time interval; and transmit, by the one or more processors, one or more beacon signals according to the modified time interval.
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公开(公告)号：US20240169134A1
公开(公告)日：2024-05-23
申请号：US18462628
申请日：2023-09-07
Applicant: X DEVELOPMENT LLC
Inventor： Alessandro Tempia Calvino , Xiaoqing Xu , Herman Schmit
IPC: G06F30/327 , G06F17/11 , G06F30/337
CPC classification number: G06F30/327 , G06F17/11 , G06F30/337
Abstract: The technology involves transistor-level synthesis for integrated circuit design and fabrication. According to one aspect, a computer-implemented method performs transistor-level synthesis for an integrated circuit element. This includes generating single-stage transistor networks from Boolean functions, in which each single-stage transistor network is composed of a pulldown network and a pullup network. The single-stage transistor networks are scaled to multi-stage transistor networks to globally optimize for factored form literals. Technology mapping can then be performed based on the factored form literals to generate a circuit design.
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公开(公告)号：US20240152103A1
公开(公告)日：2024-05-09
申请号：US17981117
申请日：2022-11-04
Applicant: X Development LLC
Inventor： Rui Yao , Xinyue Li , Leo Francis Casey , Mike Miao He
IPC: G05B19/042
CPC classification number: G05B19/042 , G05B2219/2639
Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for performing an electric grid time synchronization process. The process can include: receiving, from a GPS transceiver of a first device coupled to an electric power grid, data including a GPS time reference; formatting the GPS time reference into a data packet, where the data packet has a particular format compatible with power line communication; and broadcasting, by the first device and using power line communications, the data packet to a plurality of electric grid components.
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公开(公告)号：US11973534B2
公开(公告)日：2024-04-30
申请号：US17513190
申请日：2021-10-28
Applicant: X Development LLC
Inventor： Varun Puri , Ozgun Bursalioglu Yilmaz
IPC: H04B10/00 , G06F18/214 , G06N3/08 , H04B10/079 , H04B10/112 , H04J14/00
CPC classification number: H04B10/0795 , G06F18/214 , G06N3/08 , H04B10/112
Abstract: A method of operating a communication network includes training a neural network and implementing the neural network to determine link availability. Training the neural network includes receiving first images and signal visibility data for first locations for one or more first nodes in the communication network, generating training data based on the first images and the signal visibility data, and training the neural network using the training data to output an attenuation category related to attenuation rate of a link based on a training image and a timestamp for the training image. Implementing the neural network includes receiving second images for second locations for one or more second nodes in the communication network, determining link availability based on the second images and outputs from the neural network, and operating the communication network based on the link availability.
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