公开(公告)号：US20140253680A1

公开(公告)日：2014-09-11

申请号：US13791552

申请日：2013-03-08

Applicant: SILICON INTEGRATED SYSTEMS CORP.

Inventor： Albert Hua Tai ,  Heng-Yi Liu

IPC: H04N13/00

CPC classification number: H04N9/78 ,  H04N9/646

Abstract: An image compensation device is disclosed. The image compensation image compensation device comprises a 3D band pass filter, a 3D notch filter, a 3D notch mixing unit, a 3D summing unit, a non-3D notch filter, a non-3D band pass filter, a non-3D notch mixing unit, a non-3D band pass mixing unit, and a non-3D summing unit. The 3D notch mixing unit is used for compensating an output of the 3D notch filter. The non-3D notch mixing unit is used for compensating an output of the non-3D notch filter. The non-3D band pass mixing unit is used for compensating an output of the non-3D band pass filter. The image compensation device of the present invention is capable of avoiding the unstable and sparkle-like situation in the prior arts.

Abstract translation: 公开了一种图像补偿装置。 图像补偿图像补偿装置包括3D带通滤波器，3D陷波滤波器，3D陷波混合单元，3D求和单元，非3D陷波滤波器，非3D带通滤波器，非3D陷波滤波器 单元，非3D频带混合单元和非3D求和单元。 3D陷波混合单元用于补偿3D陷波滤波器的输出。 非3D陷波混合单元用于补偿非3D陷波滤波器的输出。 非3D带通混合单元用于补偿非3D带通滤波器的输出。 本发明的图像补偿装置能够避免现有技术中的不稳定和闪光状态。

公开(公告)号：US20040119890A1

公开(公告)日：2004-06-24

申请号：US10323671

申请日：2002-12-20

Applicant: Silicon Integrated Systems Corp.

Inventor： Wen-Kuo Lin ,  Jong-Ho Yan

IPC: H04N005/08

CPC classification number: H04N7/012

Abstract: A method for detecting dynamic video pixels by using adaptive counter threshold values according to field difference value of the frame in the video, thereby to determine whether the frame is an interlaced frame or a progressive frame and to eliminate incorrect judgements resulting from field difference and to improve accuracy of frame determination.

Abstract translation: 一种通过使用根据视频中的帧的场差值的自适应计数器阈值来检测动态视频像素的方法，从而确定该帧是隔行扫描帧还是逐行帧，并且消除由场差引起的不正确判断，并且 提高帧确定的准确性。

公开(公告)号：US20040010625A1

公开(公告)日：2004-01-15

申请号：US10191213

申请日：2002-07-09

Applicant: Silicon Integrated Systems Corp.

Inventor： Lih-Shang Lo ,  Chuan Liu

IPC: G06F015/16

CPC classification number: H04L69/324

Abstract: An interface device for the synchronous transfer of data over serial ATA. The link layer portion receives the data from a device. The status monitor detects the status of the link layer portion. The fix pattern generator provides primitive formats responding to the status of the link layer portion. The physical layer controller directly returns the primitive formats to the device without sending or receiving the primitive formats to the link layer portion.

Abstract translation: 用于通过串行ATA同步传输数据的接口设备。 链路层部分从设备接收数据。 状态监视器检测链路层部分的状态。 固定模式生成器提供响应于链路层部分的状态的原始格式。 物理层控制器直接将原始格式返回到设备，而不向链路层部分发送或接收原始格式。

公开(公告)号：US20040010531A1

公开(公告)日：2004-01-15

申请号：US10191168

申请日：2002-07-09

Applicant: Silicon Integrated Systems Corp.

Inventor： Chung-Yen Lu ,  Kuo-Wei Yeh

IPC: G06F007/44

CPC classification number: G06F1/0356 ,  G06F7/483 ,  G06F7/556 ,  G06F2101/10

Abstract: An apparatus for calculating an exponential calculating result for a base 2 floating-point number comprises a transforming device, K exponential tables and a multiplier. The transforming device receives the floating-point number, transforms the floating-point number to an integer part and a fractional part and outputs the integer part and the fractional part. The fractional part is an N-bit number and divided into K parts which have N1, N2, . . . , NK bits respectively, wherein NnullN1nullN2null . . . nullNK. Each of the exponential tables receives one of the K parts divided from the fractional part and outputs a result. The multiplier receives all results from the exponential tables and outputs a mantissa. The integer part outputted form the transforming device is an exponent. The mantissa, the exponent and a sign whose value is 0 is used to represent an exponential calculating result which is represented in the following format: (null1)Synull2Eynullmy, where Sy is the sign whose value is 0, Ey is the integer part, my is the mantissa and lnullmy

Abstract translation: 用于计算基本2浮点数的指数计算结果的装置包括变换装置，K个指数表和乘数。 变换设备接收浮点数，将浮点数转换为整数部分和小数部分，并输出整数部分和小数部分。 小数部分是N位数，并分为具有N1，N2的K个部分。 。 。 ，NK位，其中N = N1 + N2 +。 。 。 + NK。 每个指数表接收从小数部分中分离的K个部分中的一个，并输出结果。 乘数从指数表接收所有结果并输出尾数。 从变换装置输出的整数部分是指数。 尾数，指数和值为0的符号用于表示以下格式表示的指数计算结果：（-1） .2 .my，其中Sy是其值的符号 是0，Ey是整数部分，我是尾数，l <= My <2。

公开(公告)号：US20030146478A1

公开(公告)日：2003-08-07

申请号：US10382842

申请日：2003-03-07

Applicant: SILICON INTEGRATED SYSTEMS CORP.

Inventor： Wen Ping Yen ,  Yun Hsiu Chen ,  Hung-Cheng Weng

IPC: H01L029/76 ,  H01L031/062 ,  H01L021/8234

CPC classification number: H01L29/51 ,  H01L21/28114 ,  H01L21/28167 ,  H01L21/28194 ,  H01L21/823462 ,  H01L29/42376 ,  H01L29/511 ,  H01L29/513

Abstract: A MOS device with dual gate insulators has a first gate insulator formed on a predetermined area of a semiconductor substrate, and a second gate insulator formed outside the predetermined area of the semiconductor substrate to surround the first gate insulator. The second gate insulator is thicker than the first gate insulator. In addition, a gate electrode layer is patterned on the dual gate insulators. The bottom center of the gate electrode layer covers the first gate insulator, and the bottom edge of the gate electrode layer extends to cover the second gate insulator.

公开(公告)号：US20030043161A1

公开(公告)日：2003-03-06

申请号：US09947803

申请日：2001-09-06

Applicant: SILICON INTEGRATED SYSTEMS CORP.

Inventor： Jaw-Chih Tseng ,  Chung-Chieh Liu

IPC: G09G005/00

CPC classification number: G09G5/001 ,  G09G5/363

Abstract: The present invention discloses an apparatus and method for bitmapping and synchronization. The present invention increases the serial number of a graphic command issued by a CPU. A page number of a display memory bitmapping to a graphic commands and a serial number of the graphic command are stored in a system memory connected to a CPU. The CPU directly accesses the display memory until the serial number corresponding to the page number stored in the page info equal to the page number of the graphic command issued currently by the CPU is less than the serial number of the graphic command executed currently by the graphic accelerator and the problem of data inconsistency could be neglected.

Abstract translation: 本发明公开了一种用于位图和同步的装置和方法。 本发明增加了由CPU发出的图形命令的序列号。 对图形命令和图形命令的序列号进行位图的显示存储器的页码存储在连接到CPU的系统存储器中。 CPU直接访问显示存储器，直到与页面信息中存储的页码相对应的序列号等于CPU当前发布的图形命令的页码小于图形当前执行的图形命令的序列号 加速器和数据不一致的问题可以忽略不计。

公开(公告)号：US20240388114A1

公开(公告)日：2024-11-21

申请号：US18665138

申请日：2024-05-15

Applicant: SILICON INTEGRATED SYSTEMS CORP.

Inventor： Song Sheng LIN ,  Keng-Nan CHEN

IPC: H02J7/00 ,  G05F3/16

Abstract: A constant current charging device is configured to charge a device to be charged and includes: a reference current source; a current mirror electrically coupled to the reference current source and configured to output a mirror current; a current adjustment control unit electrically coupled to the current mirror and the device to be charged; and a current compensation unit electrically coupled to the current mirror and the current adjustment control unit. The current adjustment control unit includes a control transistor and a control contact connected to an output terminal of the current compensation unit and the control transistor, wherein the current adjustment control unit controls the control transistor according to a charging voltage to reduce current flows through the control contact.

公开(公告)号：US11520452B2

公开(公告)日：2022-12-06

申请号：US17537536

申请日：2021-11-30

Applicant: Silicon Integrated Systems Corp.

Inventor： Yi-Feng Chiang ,  Cheng-Yi Huang

IPC: G06F3/044 ,  G06F3/041

Abstract: The present invention discloses a noise reduction touch light adjustment device including a light adjustment film, a capacitive touch panel, a noise reduction film, a glass substrate, a control circuit module, and an alternating current (AC) transformer. The noise reduction film is disposed between the light adjustment film and the capacitive touch panel to lower noise inputted from the AC transformer into the light adjustment film such that the capacitive touch panel is ensured to be operated precisely.

公开(公告)号：US20210337337A1

公开(公告)日：2021-10-28

申请号：US17237259

申请日：2021-04-22

Applicant: Silicon Integrated Systems Corp.

Inventor： Han-Ning CHEN ,  Chien-Yu CHIANG

IPC: H04S7/00 ,  H04R5/04 ,  H04S1/00

Abstract: A digital audio array circuit is provided. The digital audio array circuit includes at least two digital audio units and a system master unit. Each of the digital audio units is configured to transform a received sound wave to a digital audio signal. Each of the digital audio units includes a left/right channel configuration input terminal. The system master unit is connected to the at least two digital audio units in time division multiplexing to receive the digital audio signals. The left/right channel configuration input terminal of each of the digital audio units is configured to receive a same synchronizing signal.

公开(公告)号：US20210173611A1

公开(公告)日：2021-06-10

申请号：US17107220

申请日：2020-11-30

Applicant: SILICON INTEGRATED SYSTEMS CORP.

Inventor： Han-Ning Chen

IPC: G06F3/16 ,  G06F1/04

Abstract: The present disclosure provides an audio data processing circuit and an audio data processing method. The audio data processing circuit includes a word select interface, a clock signal interface and an audio data interface. The word select interface is configured to receive a word select signal. The clock signal interface is configured to receive a clock signal, and generating an audio data interface signal according to a number of clocks of the clock signal in one period of the word select signal. The audio data interface is configured to transmit the audio data to a processing unit through a first transmission protocol or a second transmission protocol.