公开(公告)号：US20050158936A1

公开(公告)日：2005-07-21

申请号：US11064820

申请日：2005-02-25

Applicant: Kiyoshi Kato ,  Toshihiko Saito ,  Atsuo Isobe ,  Toru Takayama ,  Junya Maruyama ,  Yuugo Goto ,  Yumiko Ohno

Inventor： Kiyoshi Kato ,  Toshihiko Saito ,  Atsuo Isobe ,  Toru Takayama ,  Junya Maruyama ,  Yuugo Goto ,  Yumiko Ohno

IPC: H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  H01L21/8234

CPC classification number: H01L29/78696 ,  H01L27/12 ,  H01L27/1281 ,  H01L29/66757 ,  H01L29/78675 ,  H01L2221/68368

Abstract: An object of the present invention is to provide a semiconductor device formed by laser crystallization by which formation of grain boundaries in the TFT channel formation region can be avoided, and a method of manufacturing the same. Still another object of the present invention is to provide a method of designating the semiconductor device. The present invention relates to a semiconductor device with a plurality of cells each having a plurality of TFTs that have the same channel length direction, in which the plural cells form a plurality of columns along the channel length direction, in which an island-like semiconductor film of each of the plural TFTs is crystallized by laser light running in the channel length direction, in which a channel formation region of the island-like semiconductor film is placed on a depressive portion of a base film that has a rectangular or stripe pattern concave and convex with the channel length direction matching the longitudinal direction of the depressive portion, and in which a plurality of wires for electrically connecting the plural cells with one another are formed between the plural columns.

公开(公告)号：US06911358B2

公开(公告)日：2005-06-28

申请号：US10330019

申请日：2002-12-27

Applicant: Munehiro Azami ,  Chiho Kokubo ,  Aiko Shiga ,  Atsuo Isobe ,  Hiroshi Shibata ,  Shunpei Yamazaki

Inventor： Munehiro Azami ,  Chiho Kokubo ,  Aiko Shiga ,  Atsuo Isobe ,  Hiroshi Shibata ,  Shunpei Yamazaki

IPC: G02F1/1368 ,  G09F9/00 ,  H01L21/20 ,  H01L21/268 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786 ,  H01L21/00

CPC classification number: H01L21/02678 ,  H01L21/02683 ,  H01L21/02691 ,  H01L21/2026 ,  H01L27/12 ,  H01L27/1281 ,  H01L27/1285 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78603 ,  H01L29/78621 ,  H01L29/78675

Abstract: A method for manufacturing a semiconductor device having steps of forming an amorphous semiconductor on a substrate having an insulating surface; patterning the amorphous semiconductor to form plural first island-like semiconductors; irradiating a linearly condensed laser beam on the plural first island-like semiconductors while relatively scanning the substrate, thus crystallizing the plural first island-like semiconductors; patterning the plural first island-like semiconductors that have been crystallized to form plural second island-like semiconductors; forming plural transistors using the plural second island-like semiconductors; and forming a unit circuit using a predetermined number of the transistors, where the second island-like semiconductors used for the predetermined number of the transistors are formed from the first island-like semiconductors that are different from each other.

Abstract translation: 一种制造半导体器件的方法，具有在具有绝缘表面的衬底上形成非晶半导体的步骤; 图案化非晶半导体以形成多个第一岛状半导体; 在相对扫描基板的同时，在多个第一岛状半导体上照射线性聚集的激光束，从而使多个第一岛状半导体结晶; 图案化已经结晶以形成多个第二岛状半导体的多个第一岛状半导体; 使用多个第二岛状半导体形成多个晶体管; 并且使用预定数量的晶体管形成单位电路，其中用于预定数量的晶体管的第二岛状半导体由彼此不同的第一岛状半导体形成。

公开(公告)号：US06884668B2

公开(公告)日：2005-04-26

申请号：US10370055

申请日：2003-02-21

Applicant: Shunpei Yamazaki ,  Atsuo Isobe ,  Tamae Takano ,  Hidekazu Miyairi

Inventor： Shunpei Yamazaki ,  Atsuo Isobe ,  Tamae Takano ,  Hidekazu Miyairi

IPC: H01L21/20 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L21/00 ,  H01L29/04

CPC classification number: H01L21/02691 ,  H01L21/02678 ,  H01L21/02683 ,  H01L21/2022 ,  H01L27/12 ,  H01L27/1281

Abstract: To provide devices relating to a manufacturing method for a semiconductor device using a laser crystallization method, which is capable of reducing a cost involved in a design change, preventing a grain boundary from developing in a channel formation region of a TFT, and preventing a remarkable reduction in mobility of the TFT, a decrease in an ON current, and an increase in an OFF current due to the grain boundary and to a semiconductor device formed by using the manufacturing method. In a semiconductor device according to the present invention, among a plurality of TFTs formed on a base film, some TFTs are electrically connected to form logic elements. The plurality of logic elements are used to form a circuit. The base film has a plurality of projective portions having a rectangular or stripe shape. Island-like semiconductor films included in each of the plurality of TFTs are formed between the plurality of projective portions and also, are crystallized by a laser light scanned in a longitudinal direction of the projective portions.

Abstract translation: 为了提供与使用激光结晶法的半导体器件的制造方法相关的装置，其能够降低设计变化中涉及的成本，防止晶界在TFT的沟道形成区域中发展，并且防止显着 TFT的迁移率的降低，导通电流的降低以及由于晶界引起的关断电流的增加以及通过使用该制造方法形成的半导体器件。 在根据本发明的半导体器件中，在形成在基膜上的多个TFT中，一些TFT电连接形成逻辑元件。 多个逻辑元件用于形成电路。 基膜具有多个具有矩形或条状的突出部分。 包含在多个TFT中的多个TFT中的岛状半导体膜形成在多个投影部之间，并且通过沿着投影部的纵向扫描的激光而结晶化。

公开(公告)号：US06620658B2

公开(公告)日：2003-09-16

申请号：US10071211

申请日：2002-02-11

Applicant: Atsuo Isobe ,  Toru Takayama ,  Tatsuya Arao ,  Akihiko Koura

Inventor： Atsuo Isobe ,  Toru Takayama ,  Tatsuya Arao ,  Akihiko Koura

IPC: H01L2100

CPC classification number: H01L29/78603 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1259 ,  H01L29/4908 ,  H01L29/66757

Abstract: A gate insulating film of a TFT is formed without increasing a substrate temperature so that a substrate having a low heat resistance such as a plastic substrate can be used. Further, a structure in which an S value of the above TFT is improved and an off leak current is reduced is used to realize the improvement of reliability of a semiconductor device. In the case where the gate insulating film is formed, it is formed by sputtering so that a region having 0.4 atomic % to 1.6 atomic % is present at concentration measurement of hydrogen in the film by an HFS analysis (hydrogen forward scattering analysis). Then, an insulating film is formed thereon by sputtering so that a region having 0.2 atomic % or less is present at concentration measurement of hydrogen in the film by an HFS analysis. When a TFT is manufactured using such a structure of the gate insulating film, there are obtained TFT characteristics such that a subthreshold coefficient is low and a leak current flowing between a gate electrode and a source electrode or a leak current flowing between a gate electrode and a drain electrode is suppressed.

公开(公告)号：US06586766B2

公开(公告)日：2003-07-01

申请号：US10124373

申请日：2002-04-18

Applicant: Shunpei Yamazaki ,  Etsuko Fujimoto ,  Atsuo Isobe ,  Toru Takayama ,  Kunihiko Fukuchi

Inventor： Shunpei Yamazaki ,  Etsuko Fujimoto ,  Atsuo Isobe ,  Toru Takayama ,  Kunihiko Fukuchi

IPC: H01L2904

CPC classification number: H01L27/1237 ,  G02F1/13454 ,  H01L27/1248 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/78645

Abstract: The invention is to provide a high-productivity method for fabricating a TFT device having different LDD structures on one and the same substrate, and the TFT device. Specifically, the invention provides a novel TFT structure, and a high-productivity method for fabricating it. A Ta film or a Ta-based film having good heat resistance is used for forming interconnections, and the interconnections are covered with a protective film. The interconnections can be subjected to heat treatment at high temperatures (400 to 700° C.), and, in addition, the protective film serves as an etching stopper. In the peripheral driving circuit portion in the device, TFTs having an LDD structure are disposed in a self-aligned process in which is used side walls 126 and 127; while in the pixel matrix portion therein, TFTs having an LDD structure are disposed in a non-self-aligned process in which is used an insulator 125.

Abstract translation: 本发明提供一种用于制造在同一基板上具有不同LDD结构的TFT器件和TFT器件的高生产率方法。 具体地说，本发明提供了一种新颖的TFT结构，以及高生产率的制造方法。 使用具有良好耐热性的Ta膜或Ta基膜形成互连，并且互连用保护膜覆盖。 互连可以在高温（400〜700℃）下进行热处理，另外，保护膜用作蚀刻停止体。 在器件的外围驱动电路部分中，具有LDD结构的TFT以自对准工艺设置，其中使用侧壁126和127; 而在其中的像素矩阵部分中，具有LDD结构的TFT被设置在非自对准工艺中，其中使用绝缘体125。

公开(公告)号：US09960278B2

公开(公告)日：2018-05-01

申请号：US13437271

申请日：2012-04-02

Applicant: Yuhei Sato ,  Keiji Sato ,  Toshinari Sasaki ,  Tetsunori Maruyama ,  Atsuo Isobe ,  Tsutomu Murakawa ,  Sachiaki Tezuka

Inventor： Yuhei Sato ,  Keiji Sato ,  Toshinari Sasaki ,  Tetsunori Maruyama ,  Atsuo Isobe ,  Tsutomu Murakawa ,  Sachiaki Tezuka

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/32 ,  H01L21/477

CPC classification number: H01L29/7869 ,  H01L21/477

Abstract: To provide a highly reliable semiconductor device manufactured by giving stable electric characteristics to a semiconductor device including an oxide semiconductor. In a manufacturing process of a transistor, an oxide semiconductor layer, a source electrode layer, a drain electrode layer, a gate insulating film, a gate electrode layer, and an aluminum oxide film are formed in this order, and then heat treatment is performed on the oxide semiconductor layer and the aluminum oxide film, whereby an oxide semiconductor layer from which an impurity containing a hydrogen atom is removed and which includes a region containing oxygen more than the stoichiometric proportion is formed. In addition, when the aluminum oxide film is formed, entry and diffusion of water or hydrogen into the oxide semiconductor layer from the air due to heat treatment in a manufacturing process of a semiconductor device or an electronic appliance including the transistor can be prevented.

公开(公告)号：US09178069B2

公开(公告)日：2015-11-03

申请号：US12533401

申请日：2009-07-31

Applicant: Atsuo Isobe ,  Shunpei Yamazaki ,  Koji Dairiki ,  Hiroshi Shibata ,  Chiho Kokubo ,  Tatsuya Arao ,  Masahiko Hayakawa ,  Hidekazu Miyairi ,  Akihisa Shimomura ,  Koichiro Tanaka ,  Mai Akiba

Inventor： Atsuo Isobe ,  Shunpei Yamazaki ,  Koji Dairiki ,  Hiroshi Shibata ,  Chiho Kokubo ,  Tatsuya Arao ,  Masahiko Hayakawa ,  Hidekazu Miyairi ,  Akihisa Shimomura ,  Koichiro Tanaka ,  Mai Akiba

IPC: H01L21/268 ,  H01L29/786 ,  H01L21/3213 ,  H01L21/02 ,  B23K26/073 ,  H01L21/20 ,  H01L21/84 ,  H01L29/66 ,  H01L27/12

CPC classification number: H01L27/1222 ,  B23K26/0738 ,  H01L21/02354 ,  H01L21/02356 ,  H01L21/02675 ,  H01L21/02683 ,  H01L21/02686 ,  H01L21/02691 ,  H01L21/2026 ,  H01L21/32139 ,  H01L21/84 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1274 ,  H01L27/1281 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78675 ,  H01L29/78696 ,  Y10S118/90 ,  Y10T117/10 ,  Y10T117/1004 ,  Y10T117/1008

Abstract: A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.

公开(公告)号：US08766255B2

公开(公告)日：2014-07-01

申请号：US13418558

申请日：2012-03-13

Applicant: Atsuo Isobe ,  Toshihiko Saito ,  Kiyoshi Kato

Inventor： Atsuo Isobe ,  Toshihiko Saito ,  Kiyoshi Kato

IPC: H01L29/786

CPC classification number: H01L27/1156 ,  H01L21/76232 ,  H01L27/1225 ,  H01L29/4236

Abstract: A semiconductor device in which improvement of a property of holding stored data can be achieved. Further, power consumption of a semiconductor device is reduced. A transistor in which a wide-gap semiconductor material capable of sufficiently reducing the off-state current of a transistor (e.g., an oxide semiconductor material) in a channel formation region is used and which has a trench structure, i.e., a trench for a gate electrode and a trench for element isolation, is provided. The use of a semiconductor material capable of sufficiently reducing the off-state current of a transistor enables data to be held for a long time. Further, since the transistor has the trench for a gate electrode, the occurrence of a short-channel effect can be suppressed by appropriately setting the depth of the trench even when the distance between the source electrode and the drain electrode is decreased.

Abstract translation: 一种其中可以实现保持存储数据的性质的改进的半导体器件。 此外，半导体器件的功耗降低。 使用能够充分降低沟道形成区域中的晶体管（例如，氧化物半导体材料）的截止电流的宽间隙半导体材料的晶体管，其具有沟槽结构，即，沟槽结构 栅电极和用于元件隔离的沟槽。 使用能够充分降低晶体管的截止电流的半导体材料能够长时间保持数据。 此外，由于晶体管具有用于栅极电极的沟槽，所以即使当源电极和漏电极之间的距离减小时，也可以通过适当地设置沟槽的深度来抑制短沟道效应的发生。

公开(公告)号：US08581309B2

公开(公告)日：2013-11-12

申请号：US13277489

申请日：2011-10-20

Applicant: Shunpei Yamazaki ,  Atsuo Isobe ,  Hiromichi Godo ,  Yutaka Okazaki

Inventor： Shunpei Yamazaki ,  Atsuo Isobe ,  Hiromichi Godo ,  Yutaka Okazaki

IPC: H01L27/092

CPC classification number: H01L27/1266 ,  H01L21/823807 ,  H01L21/823871 ,  H01L23/433 ,  H01L23/481 ,  H01L23/552 ,  H01L27/0688 ,  H01L27/1214 ,  H01L27/1229 ,  H01L29/7843 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/16152 ,  H01L2924/16195

Abstract: An object is to realize high performance and low power consumption in a semiconductor device having an SOI structure. In addition, another object is to provide a semiconductor device having a high performance semiconductor element which is more highly integrated. A semiconductor device is such that a plurality of n-channel field-effect transistors and p-channel field-effect transistors are stacked with an interlayer insulating layer interposed therebetween over a substrate having an insulating surface. By controlling a distortion caused to a semiconductor layer due to an insulating film having a stress, a plane orientation of the semiconductor layer, and a crystal axis in a channel length direction, difference in mobility between the n-channel field-effect transistor and the p-channel field-effect transistor can be reduced, whereby current driving capabilities and response speeds of the n-channel field-effect transistor and the p-channel field-effect can be comparable.

Abstract translation: 目的是在具有SOI结构的半导体器件中实现高性能和低功耗。 此外，另一个目的是提供一种具有更高集成度的高性能半导体元件的半导体器件。 半导体器件使得多个n沟道场效应晶体管和p沟道场效应晶体管层叠在其间具有绝缘表面的衬底之间的层间绝缘层。 通过控制由于具有应力的绝缘膜，半导体层的平面取向和沟道长度方向的晶轴引起的半导体层的失真，n沟道场效应晶体管和 可以减小p沟道场效应晶体管，由此n沟道场效应晶体管的电流驱动能力和响应速度与p沟道场效应相当。

公开(公告)号：US08546210B2

公开(公告)日：2013-10-01

申请号：US12794120

申请日：2010-06-04

Applicant: Yoshiaki Yamamoto ,  Koichiro Tanaka ,  Atsuo Isobe ,  Daisuke Ohgarane ,  Shunpei Yamazaki

Inventor： Yoshiaki Yamamoto ,  Koichiro Tanaka ,  Atsuo Isobe ,  Daisuke Ohgarane ,  Shunpei Yamazaki

IPC: H01L21/336

CPC classification number: H01L21/6835 ,  H01L21/02532 ,  H01L21/02683 ,  H01L21/02691 ,  H01L21/84 ,  H01L23/544 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L27/12 ,  H01L29/78603 ,  H01L29/78648 ,  H01L2221/6835 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/6677 ,  H01L2224/16 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48464 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/838 ,  H01L2224/85 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/0106 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01Q1/38 ,  H01Q9/285 ,  H01Q23/00 ,  Y10S438/982 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: It is an object of the present invention to provide a method of separating a thin film transistor, and circuit or a semiconductor device including the thin film transistor from a substrate by a method different from that disclosed in the patent document 1 and transposing the thin film transistor, and the circuit or the semiconductor device to a substrate having flexibility. According to the present invention, a large opening or a plurality of openings is formed at an insulating film, a conductive film connected to a thin film transistor is formed at the opening, and a peeling layer is removed, then, a layer having the thin film transistor is transposed to a substrate provided with a conductive film or the like. A thin film transistor according to the present invention has a semiconductor film which is crystallized by laser irradiation and prevents a peeling layer from exposing at laser irradiation not to be irradiated with laser light.

Abstract translation: 本发明的目的是提供一种通过与专利文献1中公开的方法不同的方法从衬底分离薄膜晶体管和包括薄膜晶体管的电路或半导体器件的方法，并且将薄膜 晶体管，以及电路或半导体器件到具有柔性的衬底。 根据本发明，在绝缘膜上形成大的开口或多个开口，在开口处形成连接到薄膜晶体管的导电膜，并且去除剥离层，然后，将具有薄的 薄膜晶体管转置到具有导电膜等的基板上。 根据本发明的薄膜晶体管具有通过激光照射而结晶的半导体膜，并且防止剥离层在不被激光照射的激光照射下曝光。