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公开(公告)号:US20220293018A1
公开(公告)日:2022-09-15
申请号:US17508866
申请日:2021-10-22
Applicant: BOE Technology Group Co., Ltd.
Inventor: Shuilang DONG , Xinhong LU , Jingshang ZHOU , Lei ZHAO , Zhanfeng CAO , Dapeng XUE , Lizhong WANG , Guangcai YUAN
Abstract: The present application discloses an array substrate and a splicing screen. The array substrate provided by an embodiment of the present application includes: a flexible base, wherein the flexible base includes a display region, a first region and a second region, the display region and at least one of the first region and the second region are located in different planes, and the first region is located between the display region and the second region; a plurality of signal lines, arranged on the display region and the first region; a plurality of fan-out lines, arranged on the second region and connected with the plurality of signal lines in a one-to-one correspondence; and a buffer cushion, arranged on the first region, wherein an orthographic projection of the buffer cushion on the flexible base does not overlap with orthographic projections of the signal lines on the flexible base.
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公开(公告)号:US20220255025A1
公开(公告)日:2022-08-11
申请号:US17732781
申请日:2022-04-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Wei YANG , Guangcai YUAN , Ce NING , Xinhong LU , Tianmin ZHOU , Xin YANG
Abstract: The present disclosure relates to an OLED display panel and display device. The OLED display panel includes: a display area, a bending area and a bonding area for bonding a circuit board, wherein the display panel further includes: a base substrate; a first semiconductor pattern on the base substrate; a first insulating layer group on the first semiconductor pattern; a second semiconductor pattern on the first insulating layer group; a second insulating layer group on the second semiconductor pattern; first via holes in the first insulating layer group and the second insulating layer group; second via holes in the second insulating layer group, wherein the display panel further includes: a first groove located in the bending area and having a depth substantially identical to that of the first via holes; and a metal trace, connecting a trace in the display area to the circuit board.
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33.
公开(公告)号:US20190267409A1
公开(公告)日:2019-08-29
申请号:US16302850
申请日:2018-03-13
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Hehe HU , Wei YANG , Xinhong LU , Ke WANG , Yu WEN
IPC: H01L27/12 , H01L29/786 , H01L29/66
Abstract: Embodiment of the present disclosure provide a thin-film transistor structure, a manufacturing method thereof, a display panel and a display device. The thin-film transistor structure includes: a base substrate; and a first thin-film transistor and a second thin-film transistor formed on the base substrate, wherein a first active layer of the first thin-film transistor is doped with hydrogen; a material of a second active layer of the second thin-film transistor is metal oxide; and a first isolation barrier surrounding the first thin-film transistor and/or a second isolation barrier surrounding the second thin-film transistor are disposed on the base substrate.
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