公开(公告)号：US08806301B2

公开(公告)日：2014-08-12

申请号：US12622084

申请日：2009-11-19

Applicant: Hsiang-Hsiung Yu ,  Yi-Hsiang Huang ,  Chung-Lin Wu ,  Yu-Chung Shen

Inventor： Hsiang-Hsiung Yu ,  Yi-Hsiang Huang ,  Chung-Lin Wu ,  Yu-Chung Shen

IPC: G11C29/00

CPC classification number: G06F11/1072 ,  G06F12/0246 ,  G11C16/10 ,  G11C29/82 ,  G11C2029/0411

Abstract: A data writing method for writing data from a host system into a flash memory chip is provided, and the flash memory chip has a plurality of physical blocks. The method includes receiving a host writing command and write data thereof, and executing the host writing command. The method also includes giving a data program command for writing the write data into one of the physical blocks of the flash memory chip, and giving a command for determining whether data stored in the physical block has any error bit. Accordingly, the method can effectively ensure the correctness of data to be written into the flash memory chip.

Abstract translation: 提供了用于将数据从主机系统写入闪存芯片的数据写入方法，并且闪存芯片具有多个物理块。 该方法包括接收主机写入命令和写入数据，以及执行主机写入命令。 该方法还包括给写入数据写入闪存芯片的一个物理块的数据程序命令，以及给出用于确定存储在物理块中的数据是否具有任何错误位的命令。 因此，该方法可以有效地确保要写入闪存芯片的数据的正确性。

公开(公告)号：US08598035B2

公开(公告)日：2013-12-03

申请号：US13151495

申请日：2011-06-02

Applicant: Michael D. Gruenhagen ,  Suku Kim ,  James J. Murphy ,  Eddy Tjhia ,  Chung-Lin Wu ,  Mark Larsen ,  Douglas E. Dolan

Inventor： Michael D. Gruenhagen ,  Suku Kim ,  James J. Murphy ,  Eddy Tjhia ,  Chung-Lin Wu ,  Mark Larsen ,  Douglas E. Dolan

IPC: H01L21/44

CPC classification number: H01L23/49513 ,  H01L23/49524 ,  H01L24/05 ,  H01L24/16 ,  H01L24/32 ,  H01L24/33 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L29/0657 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/2518 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73255 ,  H01L2224/73265 ,  H01L2224/83856 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/37099

Abstract: Disclosed are semiconductor dice with backside trenches filled with elastic conductive material. The trenches reduce the on-state resistances of the devices incorporated on the dice. The elastic conductive material provides a conductive path to the backsides of the die with little induced stress on the semiconductor die caused by thermal cycling. Also disclosed are packages using the dice, and methods of making the dice.

Abstract translation: 公开了具有填充有弹性导电材料的背面沟槽的半导体裸片。 沟槽减小了掺入骰子的器件的导通电阻。 弹性导电材料为模具的背面提供导电路径，在半导体芯片上由热循环引起的微小应力。 还公开了使用骰子的包裹以及制造骰子的方法。

公开(公告)号：US08578245B2

公开(公告)日：2013-11-05

申请号：US13037381

申请日：2011-03-01

Applicant: Chih-Kang Yeh ,  Chien-Fu Tseng ,  Chung-Lin Wu

Inventor： Chih-Kang Yeh ,  Chien-Fu Tseng ,  Chung-Lin Wu

IPC: G11C29/00 ,  G01R31/30

CPC classification number: G06F11/1072 ,  G11C11/5642 ,  G11C16/28 ,  H03M13/6337

Abstract: A data reading method for a rewritable non-volatile memory module is provided, wherein the rewritable non-volatile memory module has a plurality of physical pages. The data reading method includes grouping the physical pages into a plurality of physical page groups and configuring a corresponding threshold voltage set for each of the physical page groups. The data reading method also includes respectively reading data from the physical pages of the physical page groups by using the corresponding threshold voltage sets. The data reading method further includes when data read from one of the physical pages of one of the physical page groups cannot be corrected by using an error checking and correcting (ECC) circuit, updating the threshold voltage set corresponding to the physical page group.

Abstract translation: 提供了一种用于可重写非易失性存储器模块的数据读取方法，其中可重写非易失性存储器模块具有多个物理页面。 数据读取方法包括将物理页面分组成多个物理页面组并且为每个物理页面组配置相应的阈值电压集合。 数据读取方法还包括通过使用相应的阈值电压组分别从物理页组的物理页面读取数据。 数据读取方法还包括当通过使用错误检查和校正（ECC）电路不能校正物理页面组之一的物理页面之一读取的数据时，更新对应于物理页面组的阈值电压设置。

公开(公告)号：US08255656B2

公开(公告)日：2012-08-28

申请号：US12822385

申请日：2010-06-24

Applicant: Hsiang-Hsiung Yu ,  Chung-Lin Wu ,  Yi-Hsiang Huang ,  Yu-Chung Shen

Inventor： Hsiang-Hsiung Yu ,  Chung-Lin Wu ,  Yi-Hsiang Huang ,  Yu-Chung Shen

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F9/26 ,  G06F9/34

CPC classification number: G06F21/10 ,  G06F21/78

Abstract: A storage device, a memory controller, and a data protection method are provided. The method includes when receiving a read command sent by a host, adopting a corresponding output flow rate limit to determine an operation that is executed on read data corresponding to the read command by the host according to location information included in the read command or a type of a transmission interface between the host and the storage device. The method also includes executing an interference procedure by the storage device to prevent the read data from being copied to the host or slow down the speed of copying the read data to the host when identifying that the operation is a copy operation.

Abstract translation: 提供存储装置，存储器控制器和数据保护方法。 该方法包括当接收到主机发送的读取命令时，采用相应的输出流量限制，以根据包括在读取命令中的位置信息或类型的类型来确定对主机对应于读取命令的读取数据执行的操作 主机和存储设备之间的传输接口。 该方法还包括执行存储设备的干扰过程，以防止读取数据被复制到主机，或者当识别操作是复制操作时，将读取的数据复制到主机的速度降低。

公开(公告)号：US07968982B2

公开(公告)日：2011-06-28

申请号：US12170523

申请日：2008-07-10

Applicant: Chung-Lin Wu ,  Rajeev D. Joshi

Inventor： Chung-Lin Wu ,  Rajeev D. Joshi

IPC: H01L23/495 ,  H01L23/10 ,  H01L23/34 ,  H01L23/28

CPC classification number: H01L21/561 ,  H01L21/4828 ,  H01L23/4334 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor package includes a semiconductor device 30 and a molded upper heat sink 10. The heat sink has an interior surface 16 that faces the semiconductor device and an exterior surface 15 that is at least partially exposed to the ambient environment of the packaged device. An annular planar base 11 surrounds a raised or protruding central region 12. That region is supported above the plane of the base 11 by four sloped walls 13.1-13.4. The walls slope at an acute angle with respect to the planar annular base and incline toward the center of the upper heat sink 10. Around the outer perimeter of the annular base 11 are four support arms 18.1-18.4. The support arms are disposed at an obtuse angle with respect to the interior surface 16 of the planar annular base 11.

Abstract translation: 半导体封装包括半导体器件30和模制的上部散热器10.散热器具有面向半导体器件的内表面16和至少部分地暴露于封装器件周围环境的外表面15。 环形平面基座11围绕凸出或突出的中心区域12.该区域由基座11的平面支承在四个倾斜壁13.1-13.4之上。 壁相对于平面环形基座呈锐角倾斜，并朝向上散热片10的中心倾斜。环形基座11的外周围是四个支撑臂18.1-18.4。 支撑臂相对于平面环形基座11的内表面16以钝角设置。

公开(公告)号：US20110145482A1

公开(公告)日：2011-06-16

申请号：US12705325

申请日：2010-02-12

Applicant: Hsiang-Hsiung Yu ,  Yi-Hsiang Huang ,  Chung-Lin Wu ,  Yu-Chung Shen

Inventor： Hsiang-Hsiung Yu ,  Yi-Hsiang Huang ,  Chung-Lin Wu ,  Yu-Chung Shen

IPC: G06F12/14

CPC classification number: G06F21/6209

Abstract: A block management method for managing blocks of a flash memory storage device is provided. The flash memory storage device includes a flash memory controller. The block management method includes the following steps. At least a part of the blocks is grouped into a first partition and a second partition. Whether an authentication code exists is determined. When the authentication code exists, the blocks belonging to the first partition are provided for a host system to access, so the host system displays the first partition and hides the second partition. An authentication information is received from the host system. Whether the authentication information and the authentication code are identical is authenticated. When the authentication information and the authentication code are identical, the blocks belonging to the second partition are provided for the host system to access, so the host system displays the second partition and hides the first partition.

Abstract translation: 提供一种用于管理闪存存储设备的块的块管理方法。 闪存存储设备包括闪存控制器。 块管理方法包括以下步骤。 至少一部分块被分组成第一分区和第二分区。 确定是否存在认证码。 当认证码存在时，属于第一分区的块被提供给主机系统进行访问，因此主机系统显示第一个分区并隐藏第二个分区。 从主机系统接收认证信息。 认证信息和验证码是否相同是否通过认证。 当认证信息和认证码相同时，属于第二分区的块被提供给主机系统进行访问，因此主机系统显示第二分区并隐藏第一分区。

公开(公告)号：US07635635B2

公开(公告)日：2009-12-22

申请号：US11400731

申请日：2006-04-06

Applicant: Hamza Yilmaz ,  Qi Wang ,  Minhua Li ,  Chung-Lin Wu

Inventor： Hamza Yilmaz ,  Qi Wang ,  Minhua Li ,  Chung-Lin Wu

IPC: H01L21/46

CPC classification number: H01L21/76251 ,  H01L21/6835 ,  H01L24/28 ,  H01L29/78603 ,  H01L2224/16 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/0133 ,  H01L2924/10253 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/157 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/0665

Abstract: A method of bonding a semiconductor substrate to a metal substrate is disclosed. In some embodiments the method includes forming a semiconductor device in a semiconductor substrate, the semiconductor device comprising a first surface. The method further includes obtaining a metal substrate. The metal substrate is bonded to the first surface of the semiconductor device, wherein at least a portion of the metal substrate forms an electrical terminal for the semiconductor device.

Abstract translation: 公开了将半导体衬底接合到金属衬底的方法。 在一些实施例中，该方法包括在半导体衬底中形成半导体器件，该半导体器件包括第一表面。 该方法还包括获得金属基底。 金属基板结合到半导体器件的第一表面，其中金属基板的至少一部分形成用于半导体器件的电端子。

公开(公告)号：US06236075B1

公开(公告)日：2001-05-22

申请号：US09266420

申请日：1999-03-10

Applicant: Shen-Kan Hsiung ,  Jung-Chuan Chou ,  Tai-Ping Sun ,  Wen Yaw Chung ,  Hung-Kwei Liao ,  Chung-Lin Wu

Inventor： Shen-Kan Hsiung ,  Jung-Chuan Chou ,  Tai-Ping Sun ,  Wen Yaw Chung ,  Hung-Kwei Liao ,  Chung-Lin Wu

IPC: H01L2358

CPC classification number: G01N27/414

Abstract: The present invention discloses a method of forming a metal layer by thermal evaporation or RF reactive sputtering in order to fabricate a light shielding layer for an ion sensitive field effect transistor. The multi-layered construction of the ion sensitive field effect transistor with a metal thin film as a light shielding layer is SnO2/metal/SiO2 or SnO2/metal/Si3N4/SiO2, and is able to lower the effect of light successfully.

Abstract translation: 本发明公开了一种通过热蒸镀或RF反应溅射形成金属层的方法，以制造用于离子敏感场效应晶体管的遮光层。 具有金属薄膜作为遮光层的离子敏感场效应晶体管的多层结构是SnO 2 /金属/ SiO 2或SnO 2 /金属/ Si 3 N 4 / SiO 2，并且能够成功地降低光的效果。

公开(公告)号：US08706952B2

公开(公告)日：2014-04-22

申请号：US12766265

申请日：2010-04-23

Applicant: Chih-Jen Hsu ,  Yi-Hsiang Huang ,  Chung-Lin Wu

Inventor： Chih-Jen Hsu ,  Yi-Hsiang Huang ,  Chung-Lin Wu

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G11C11/34 ,  G11C16/04 ,  G11C7/00

CPC classification number: G06F12/00 ,  G06F12/02 ,  G06F12/06

Abstract: A flash memory storage device, a controller thereof, and a data programming method are provided. The flash memory storage device has a flash memory comprising a plurality of physical blocks, each physical block includes a plurality of physical addresses, and the physical addresses comprises at least one fast physical address and at least one slow physical address. The method comprises at least grouping the physical blocks into a data area and a spare area; setting a predetermined block number; obtaining m physical blocks from the spare area, receiving a write command comprising a write data and a logical address, determining a logical address range of a buffer according to the logical address and the predetermined block number. When all logical addresses to be programmed with the write data are within the logical address range of the buffer, using a fast mode to program the data into the m physical blocks.

Abstract translation: 提供一种闪速存储器存储装置，其控制器和数据编程方法。 闪速存储器存储设备具有包括多个物理块的闪存，每个物理块包括多个物理地址，并且物理地址包括至少一个快速物理地址和至少一个慢物理地址。 该方法包括至少将物理块分组成数据区和备用区; 设定预定的块号; 从备用区获取m个物理块，接收包括写数据和逻辑地址的写命令，根据逻辑地址和预定块号确定缓冲器的逻辑地址范围。 当要写入数据的所有逻辑地址都在缓冲区的逻辑地址范围内时，使用快速模式将数据编程到m个物理块中。

公开(公告)号：US08487371B2

公开(公告)日：2013-07-16

申请号：US13074921

申请日：2011-03-29

Applicant: Daniel M. Kinzer ,  Steven Sapp ,  Chung-Lin Wu ,  Oseob Jeon ,  Bigildis Dosdos

Inventor： Daniel M. Kinzer ,  Steven Sapp ,  Chung-Lin Wu ,  Oseob Jeon ,  Bigildis Dosdos

IPC: H01L29/66 ,  H01L23/62 ,  H01L27/088 ,  H01L21/338

CPC classification number: H01L29/7827 ,  H01L24/13 ,  H01L29/41766 ,  H01L29/66666 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/7813 ,  H01L2224/131 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/00

Abstract: Systems and methods of fabricating Wafer Level Chip Scale Packaging (WLCSP) devices with transistors having source, drain and gate contacts on one side of the transistor while still having excellent electrical performance with low drain-to-source resistance RDS(on) include using a two-metal drain contact technique. The RDS(on) is further improved by using a through-silicon-via (TSV) technique to form a drain contact or by using a copper layer closely connected to the drain drift.

Abstract translation: 具有晶体管的晶体管的晶体管的晶体管的一侧制造晶圆级芯片级封装（WLCSP）器件的系统和方法仍然具有优异的电气性能，低漏极 - 源极电阻RDS（on）包括使用 双金属漏极接触技术。 通过使用穿硅通孔（TSV）技术来形成漏极接触或通过使用紧密连接到漏极漂移的铜层来进一步改善RDS（on）。