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公开(公告)号:US10050094B2
公开(公告)日:2018-08-14
申请号:US15496043
申请日:2017-04-25
Applicant: Japan Display Inc.
Inventor: Tetsuo Morita , Hiroyuki Kimura , Makoto Shibusawa , Hiroshi Tabatake , Yasuhiro Ogawa
IPC: H01L27/15 , H01L21/00 , H01L27/32 , H01L29/786
Abstract: Provided is a display device including a plurality of pixels at least one of which has a first transistor and a light-emitting element. The first transistor includes a gate electrode, a gate insulating film over the gate electrode, an oxide semiconductor film over the gate insulating film, and a first terminal and a second terminal electrically connected to the semiconductor film. The second terminal is electrically connected to the light-emitting element. A region in which the first terminal overlaps with the gate electrode can be smaller than a region in which the second terminal overlaps with the gate electrode.
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公开(公告)号:US12225806B2
公开(公告)日:2025-02-11
申请号:US17451502
申请日:2021-10-20
Applicant: Japan Display Inc.
Inventor: Sho Yanagisawa , Tetsuo Morita , Kenji Harada , Hiroshi Tabatake , Hideyuki Takahashi
IPC: H01L27/32 , H10K59/122 , H10K59/131 , H10K59/88
Abstract: According to one embodiment, a display device includes a substrate, first and second insulating layers, first and second pixel electrodes, first and second organic layers, first and second feed lines, first and second partitions, and a common electrode including first and second parts covering the first and second organic layers. The first organic layer is between the partitions. The second feed line and the second partition are located between the organic layers. The partitions are shaped such that a width of an upper part is greater than a width of a lower part. The first part is in contact with the first feed line between the first partition and the first organic layer.
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公开(公告)号:US12004402B2
公开(公告)日:2024-06-04
申请号:US17474228
申请日:2021-09-14
Applicant: Japan Display Inc.
Inventor: Hiroshi Tabatake , Tetsuo Morita , Yasuhiro Ogawa
IPC: H10K59/35 , G09F9/30 , G09F9/302 , G09G3/3208 , G09G3/3233 , H05B33/12 , H10K50/00 , H10K59/121
CPC classification number: H10K59/353 , G09G3/3208
Abstract: A drive circuit includes a holding capacitor, an element capacitor, and an additional capacitor interposed between one of the source and the drain, and one of the high-potential line and the low-potential line. The drive circuit configured to drive the first light emitter includes a first element capacitor as the element capacitor and a first additional capacitor as the additional capacitor. The driving circuit configured to drive the second light emitter includes a second element capacitor as the element capacitor and a second additional capacitor as the additional capacitor. The first element capacitor is larger in capacitance than the second element capacitor. The first additional capacitor is smaller in capacitance than the second additional capacitor.
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公开(公告)号:US11869421B2
公开(公告)日:2024-01-09
申请号:US17656265
申请日:2022-03-24
Applicant: Japan Display Inc.
Inventor: Hiroshi Tabatake , Tetsuo Morita
IPC: G09G3/3225 , H10K59/131 , G09G3/3258 , G09G3/3233 , G09G3/325 , G09G3/3208
CPC classification number: G09G3/3225 , H10K59/1315 , G09G3/325 , G09G3/3208 , G09G3/3233 , G09G3/3258 , G09G2310/061 , G09G2330/02
Abstract: According to one embodiment, a display device includes a base, a plurality of pixels, a power supply line and a power supply line drive circuit. The pixels each include a pixel circuit, a display element including a lower electrode, an upper electrode and an organic layer including a light-emitting layer. The upper electrode is connected to the power supply line that provides a predetermined potential to the upper electrode. The power supply line drive circuit supplies, to the power supply line, a first potential to the upper electrode during a light-emitting period and supplies, to the power supply line, a second potential to the upper electrode during a non-light-emitting period.
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公开(公告)号:US11557248B2
公开(公告)日:2023-01-17
申请号:US17520959
申请日:2021-11-08
Applicant: Japan Display Inc.
Inventor: Tetsuo Morita , Yasuhiro Ogawa
IPC: G09G3/00 , G09G3/32 , G09G3/20 , H01L25/075
Abstract: According to one embodiment, a display device includes a display region where pixels are arranged. Each of the pixels includes a pixel electrode, a light emitting element, a drive transistor, a first capacitance electrode layer opposed to the pixel electrode and held at a constant potential, and an insulating layer forming an auxiliary capacitance together with the pixel electrode and the first capacitance electrode layer. A value of the auxiliary capacitance of the first pixel, of the values of the auxiliary capacitance of the pixels is the largest.
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公开(公告)号:US11502150B2
公开(公告)日:2022-11-15
申请号:US17165143
申请日:2021-02-02
Applicant: Japan Display Inc.
Inventor: Tetsuo Morita , Hiroyuki Kimura , Makoto Shibusawa , Hiroshi Tabatake , Yasuhiro Ogawa
IPC: H01L27/32 , H01L27/12 , H01L29/417 , H01L29/786
Abstract: Provided is a display device including a plurality of pixels at least one of which has a first transistor and a light-emitting element. The first transistor includes a gate electrode, a gate insulating film over the gate electrode, an oxide semiconductor film over the gate insulating film, and a first terminal and a second terminal electrically connected to the semiconductor film. The second terminal is electrically connected to the light-emitting element. A region in which the first terminal overlaps with the gate electrode can be smaller than a region in which the second terminal overlaps with the gate electrode.
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公开(公告)号:US10720102B2
公开(公告)日:2020-07-21
申请号:US16248077
申请日:2019-01-15
Applicant: Japan Display Inc.
Inventor: Yutaka Umeda , Hiroyuki Kimura , Makoto Shibusawa , Tetsuo Morita
IPC: G09G3/3233 , G09G3/3258 , G09G3/3266 , H01L27/32
Abstract: A display device includes a drive transistor having a first electrode connected to a first node, a second electrode connected to a second node, and a third electrode connected to a third node, a first switch having one terminal connected to the first node, a second switch having one terminal connected to the first node, a third switch controlled by a first control signal and having one terminal connected to the second node, a fourth switch controlled by the first control signal together with the third switch, and having one terminal connected to a power supply line and another terminal connected to the third node, a capacitor element having one terminal connected to the first node and another terminal connected to the second node, and a light emitting element including a pixel electrode connected to the second node, and a first common electrode.
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公开(公告)号:US10304386B2
公开(公告)日:2019-05-28
申请号:US16177513
申请日:2018-11-01
Applicant: Japan Display Inc.
Inventor: Yasuhiro Ogawa , Hiroshi Tabatake , Hiroyuki Kimura , Tetsuo Morita , Makoto Shibusawa
IPC: G09G3/3233 , G02F1/1362 , G09G3/20 , G09G3/3258 , G02F1/1343 , H01L27/32 , G02F1/136
Abstract: A display device includes a switching element having a first input/output terminal electrically connected to a first signal line, a first wiring electrically connected to a second input/output terminal of the switching element, a transistor having a gate electrode connected to the first wiring, a second wiring electrically connected to a source or drain of the transistor, a pixel electrode connected to the second wiring, a first insulating layer which is arranged between the first wiring and the second wiring and is arranged between the first wiring and the pixel electrode, a second insulating layer between the first insulating layer and pixel electrode, and a conducting layer between the first insulating layer and the second insulating layer, the conducting layer including a region overlapping the pixel electrode. The conducting layer includes a dividing groove dividing the conducting layer into a plurality of regions at a region overlapping the pixel electrode.
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公开(公告)号:US10121413B2
公开(公告)日:2018-11-06
申请号:US14858348
申请日:2015-09-18
Applicant: Japan Display Inc.
Inventor: Tetsuo Morita , Hiroyuki Kimura , Makoto Shibusawa , Hiroshi Nakayama , Hiroshi Tabatake , Yutaka Umeda
IPC: G09G3/3233
Abstract: A flash phenomenon of OLEDs at the time of power source ON of a display device is suppressed. The OLED emits light when reference potentials VSS and VDD are applied from power source lines to the OLED's cathode and anode respectively. While the anode can be connected to one of the power source line via a driving TFT and a lighting switch, a reset potential VRS can be applied to the anode via a reset switch and the driving TFT. The lighting switch is turned OFF and the reset switch and the driving TFT are turned ON so that VRS is applied to the anode, before starting the application of the reference potentials to the power source lines. Following this state, the application of the reference potentials to the power source lines starts, and thus a normal operation of allowing the OLED to emit light starts.
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