公开(公告)号：US12171101B2

公开(公告)日：2024-12-17

申请号：US17822708

申请日：2022-08-26

Applicant: Micron Technology, Inc.

Inventor： Daniel Billingsley ,  Matthew J. King ,  Jordan D. Greenlee ,  Yongjun J. Hu ,  Tom George ,  Amritesh Rai ,  Sidhartha Gupta ,  Kyle A. Ritter

IPC: H10B41/30 ,  H01L21/28 ,  H01L29/49 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27 ,  H10B43/30 ,  H10B43/40

Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.

公开(公告)号：US12154853B2

公开(公告)日：2024-11-26

申请号：US18164903

申请日：2023-02-06

Applicant: Micron Technology, Inc.

Inventor： Naveen Kaushik ,  Sidhartha Gupta ,  Pankaj Sharma ,  Haitao Liu

IPC: H01L23/522 ,  G11C5/06 ,  H01L21/48 ,  H01L21/768 ,  H10B41/27 ,  H10B43/27

Abstract: A method of forming a microelectronic device comprises forming a stack structure comprising vertically alternating insulating structures and conductive structures arranged in tiers. Each of the tiers individually comprises one of the insulating structures and one of the conductive structures. A sacrificial material is formed over the stack structure and pillar structures are formed to extend vertically through the stack structure and the sacrificial material. The method comprises forming conductive plug structures within upper portions of the pillar structures, forming slots extending vertically through the stack structure and the sacrificial material, at least partially removing the sacrificial material to form openings horizontally interposed between the conductive plug structures, and forming a low-K dielectric material within the openings. Microelectronic devices, memory devices, and electronic systems are also described.

公开(公告)号：US20240147713A1

公开(公告)日：2024-05-02

申请号：US18394273

申请日：2023-12-22

Applicant: Micron Technology, Inc.

Inventor： Lifang Xu ,  Sidhartha Gupta ,  Kar Wui Thong ,  Harsh Narendarakumar Jain

IPC: H10B41/27 ,  G11C5/06 ,  H01L29/66 ,  H01L29/78 ,  H10B43/27

CPC classification number: H10B41/27 ,  G11C5/06 ,  H01L29/66666 ,  H01L29/7827 ,  H10B43/27

Abstract: A method of forming a microelectronic device including a first stack structure comprising alternating levels of insulative structures and other insulative structures, forming strings of memory cells through the first stack structure, forming a second stack structure over the first stack structure, based at least partially on observed amount of pillar bending within the first stack structure, forming a first tailored reticle specific to the observed amount of pillar bending, utilizing the first tailored reticle to form openings extending through the second stack structure and over some of the strings of memory cells, wherein centers of the openings over the strings of memory cells are at least substantially aligned with the centers of uppermost surfaces of the strings of memory cells in a direction of the observed pillar bending, and forming upper pillars extending through the second stack structure and over some of the strings of memory cells.

公开(公告)号：US20240099006A1

公开(公告)日：2024-03-21

申请号：US18525597

申请日：2023-11-30

Applicant: Micron Technology, Inc.

Inventor： Sidhartha Gupta ,  Anilkumar Chandolu ,  S M Istiaque Hossain

IPC: H10B43/27 ,  G11C11/56 ,  H01L21/768

CPC classification number: H10B43/27 ,  G11C11/5671 ,  H01L21/76879 ,  H01L21/76897

Abstract: An electronic device comprises a stack structure comprising vertically alternating insulative structures and conductive structures arranged in tiers, pillars extending vertically through the stack structure, and a barrier material overlying the stack structure. The electronic device comprises a first insulative material extending through the barrier material and into an upper tier portion of the stack structure, and a second insulative material laterally adjacent to the first insulative material and laterally adjacent to at least some of the conductive structures in the upper tier portion of the stack structure. At least a portion of the second insulative material is in vertical alignment with the barrier material. Additional electronic devices and related methods and systems are also disclosed.

公开(公告)号：US20240098993A1

公开(公告)日：2024-03-21

申请号：US17948521

申请日：2022-09-20

Applicant: Micron Technology, Inc.

Inventor： Andrew Li ,  Sidhartha Gupta ,  Adam W. Saxler

IPC: H01L27/11582 ,  H01L27/11556

CPC classification number: H01L27/11582 ,  H01L27/11556

Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers above a conductor tier. Strings of memory cells comprise channel-material strings that extend through the insulative tiers and the conductive tiers in the memory blocks. The channel-material strings directly electrically couple to conductor material of the conductor tier. Intervening material is laterally-between and longitudinally-along immediately-laterally-adjacent of the memory blocks. The intervening material comprises a laterally-outer insulative lining extending longitudinally-along the immediately-laterally-adjacent memory-blocks. The laterally-outer insulative lining has its lowest surface between a top and a bottom of the lowest conductive tier. The laterally-outer insulative lining has its highest surface at or below a lowest surface of the next-lowest conductive tier. Laterally-inner insulating material extends longitudinally-along the immediately-laterally-adjacent memory blocks laterally-inward of the laterally-outer insulative lining. An interface is between the laterally-outer insulative lining and the laterally-inner insulating material. Methods are also disclosed.

公开(公告)号：US11605589B2

公开(公告)日：2023-03-14

申请号：US17161313

申请日：2021-01-28

Applicant: Micron Technology, Inc.

Inventor： Naveen Kaushik ,  Sidhartha Gupta ,  Pankaj Sharma ,  Haitao Liu

IPC: H01L23/522 ,  H01L27/11582 ,  G11C5/06 ,  H01L21/48 ,  H01L21/768 ,  H01L27/11556

Abstract: A method of forming a microelectronic device comprises forming a stack structure comprising vertically alternating insulating structures and conductive structures arranged in tiers. Each of the tiers individually comprises one of the insulating structures and one of the conductive structures. A sacrificial material is formed over the stack structure and pillar structures are formed to extend vertically through the stack structure and the sacrificial material. The method comprises forming conductive plug structures within upper portions of the pillar structures, forming slots extending vertically through the stack structure and the sacrificial material, at least partially removing the sacrificial material to form openings horizontally interposed between the conductive plug structures, and forming a low-K dielectric material within the openings. Microelectronic devices, memory devices, and electronic systems are also described.

公开(公告)号：US20230045353A1

公开(公告)日：2023-02-09

申请号：US17396939

申请日：2021-08-09

Applicant: Micron Technology, Inc.

Inventor： S M Istiaque Hossain ,  Indra V. Chary ,  Anilkumar Chandolu ,  Sidhartha Gupta ,  Shuangqiang Luo

IPC: H01L23/528 ,  H01L27/11551 ,  H01L27/1157 ,  H01L27/11578 ,  H01L27/11524 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768

Abstract: A microelectronic device, including a stack structure including alternating conductive structures and dielectric structures is disclosed. Memory pillars extend through the stack structure. Contacts are laterally adjacent to the memory pillars and extending through the stack structure. The contacts including active contacts and support contacts. The active contacts including a liner and a conductive material. The support contacts including the liner and a dielectric material. The conductive material of the active contacts is in electrical communication with the memory pillars. Methods and electronic systems are also disclosed.

公开(公告)号：US20230039621A1

公开(公告)日：2023-02-09

申请号：US17395211

申请日：2021-08-05

Applicant: Micron Technology, Inc.

Inventor： Sidhartha Gupta ,  Naveen Kaushik ,  Pankaj Sharma

IPC: H01L27/11556 ,  H01L23/538 ,  H01L27/11582

Abstract: A method used in forming a memory array comprises forming a stack comprising vertically-alternating insulative tiers and conductive tiers. Channel-material strings of memory-cell strings extend through the insulative and conductive tiers. Conductive vias are formed above and individually electrically coupled to individual of the channel-material strings. Insulating material is laterally-between immediately-adjacent of the conductive vias. At least some of the insulating material is vertically removed to form an upwardly-open void-space that is circumferentially about multiple of the conductive vias. Insulative material is formed laterally-between the immediately-adjacent conductive vias to form a covered void-space from the upwardly-open void-space. Digitlines are formed above that are individually electrically coupled to a plurality of individual of the conductive vias there-below. Other embodiments, including structure independent of method, are disclosed.

公开(公告)号：US11527546B2

公开(公告)日：2022-12-13

申请号：US16943826

申请日：2020-07-30

Applicant: Micron Technology, Inc.

Inventor： Daniel Billingsley ,  Matthew J. King ,  Jordan D. Greenlee ,  Yongjun J. Hu ,  Tom George ,  Amritesh Rai ,  Sidhartha Gupta ,  Kyle A. Ritter

IPC: H01L27/11556 ,  H01L27/11573 ,  H01L27/11582 ,  H01L21/28 ,  H01L29/49 ,  H01L27/11529

Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.

公开(公告)号：US20220270830A1

公开(公告)日：2022-08-25

申请号：US17179890

申请日：2021-02-19

Applicant: Micron Technology, Inc.

Inventor： Pankaj Sharma ,  Sidhartha Gupta

IPC: H01G11/26 ,  H01L27/105 ,  H01G11/08 ,  H01G11/36 ,  H01L49/02 ,  H01G11/86

Abstract: Some embodiments include an integrated assembly having a supercapacitor supported by a semiconductor substrate. The supercapacitor includes first and second electrode bases. The first electrode base includes first laterally-projecting regions, and the second electrode base includes second laterally-projecting regions which are interdigitated with the first laterally-projecting regions. A distance between the first and second laterally-projecting regions is less than or equal to about 500 nm. Carbon nanotubes extend upwardly from the first and second electrode bases. The carbon nanotubes are configured as a first membrane structure associated with the first electrode base and as a second membrane structure associated with the second electrode base. Pseudocapacitive material is dispersed throughout the first and second membrane structures. Electrolyte material is within and between the first and second membrane structures. Some embodiments include methods of forming integrated assemblies.