Memory Systems and Methods for Improved Power Management

    公开(公告)号:US20170337965A1

    公开(公告)日:2017-11-23

    申请号:US15522182

    申请日:2015-11-04

    Applicant: Rambus Inc.

    CPC classification number: G11C11/4093 G11C5/04 G11C5/063 G11C7/22 G11C8/12

    Abstract: A memory module with multiple memory devices includes a buffer system that manages communication between a memory controller and the memory devices. Each memory device supports an access mode and a low-power mode, the latter used to save power for devices that are not immediately needed. The module provides granular power management using a chip-select decoder that decodes chip-select signals from the memory controller into power-state signals that determine which of the memory devices are in which of the modes. Devices can thus be brought out of the low-power mode in relatively small numbers, as needed, to limit power consumption.

    THRESHOLD-MONITORING, CONDITIONAL-RESET IMAGE SENSOR
    33.
    发明申请
    THRESHOLD-MONITORING, CONDITIONAL-RESET IMAGE SENSOR 审中-公开
    阈值监控,条件复位图像传感器

    公开(公告)号:US20160028985A1

    公开(公告)日:2016-01-28

    申请号:US14772311

    申请日:2014-03-14

    Applicant: RAMBUS INC.

    Abstract: An image sensor architecture with multi-bit sampling is implemented within an image sensor system. A pixel signal produced in response to light incident upon a photosensitive element is converted to a multiple-bit digital value representative of the pixel signal. If the pixel signal exceeds a sampling threshold, the photosensitive element is reset. During an image capture period, digital values associated with pixel signals that exceed a sampling threshold are accumulated into image data.

    Abstract translation: 在图像传感器系统中实现具有多位采样的图像传感器架构。 响应于入射到感光元件上的光而产生的像素信号被转换成表示像素信号的多位数字值。 如果像素信号超过采样阈值,则光敏元件被复位。 在图像捕获期间,与超过采样阈值的像素信号相关联的数字值被累积到图像数据中。

    Memory systems and methods for improved power management

    公开(公告)号:US11710520B2

    公开(公告)日:2023-07-25

    申请号:US17702475

    申请日:2022-03-23

    Applicant: Rambus Inc.

    CPC classification number: G11C11/4093 G11C5/04 G11C5/063 G11C7/22 G11C8/12

    Abstract: A memory module with multiple memory devices includes a buffer system that manages communication between a memory controller and the memory devices. Each memory device supports an access mode and a low-power mode, the latter used to save power for devices that are not immediately needed. The module provides granular power management using a chip-select decoder that decodes chip-select signals from the memory controller into power-state signals that determine which of the memory devices are in which of the modes. Devices can thus be brought out of the low-power mode in relatively small numbers, as needed, to limit power consumption.

    Memory Systems and Methods for Improved Power Management

    公开(公告)号:US20220284947A1

    公开(公告)日:2022-09-08

    申请号:US17702475

    申请日:2022-03-23

    Applicant: Rambus Inc.

    Abstract: A memory module with multiple memory devices includes a buffer system that manages communication between a memory controller and the memory devices. Each memory device supports an access mode and a low-power mode, the latter used to save power for devices that are not immediately needed. The module provides granular power management using a chip-select decoder that decodes chip-select signals from the memory controller into power-state signals that determine which of the memory devices are in which of the modes. Devices can thus be brought out of the low-power mode in relatively small numbers, as needed, to limit power consumption.

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