公开(公告)号：US20220149089A1

公开(公告)日：2022-05-12

申请号：US17515769

申请日：2021-11-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Donghoon KHANG ,  Kwangyoung OH ,  Chongkwang CHANG ,  Jinyoung KIM ,  Taehun LEE

IPC: H01L27/146 ,  H04N5/369

Abstract: An image sensor includes: a semiconductor substrate having a first side and a second side opposite to each other; a plurality of photoelectric regions arranged in the semiconductor substrate in a first direction and a second direction, perpendicular to each other, in a first region of the semiconductor substrate; and a first separation structure disposed between the plurality of photoelectric regions in the first region of the semiconductor substrate. The first separation structure includes a lower separation structure and an upper separation structure disposed above the lower separation structure, and the first separation structure includes a linear portion located between the plurality of photoelectric regions and extending in the first direction, wherein, in a cross-sectional structure of the linear portion of the first separation structure in the first direction, at least one of an upper surface of the lower separation structure and a lower surface of the upper separation structure has a wavy shape.

公开(公告)号：US20220057968A1

公开(公告)日：2022-02-24

申请号：US17233816

申请日：2021-04-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wandong KIM ,  Jinyoung KIM ,  Sehwan PARK ,  Hyun Seo ,  Sangwan NAM

IPC: G06F3/06 ,  G11C16/04 ,  G11C16/10 ,  G11C16/26 ,  G06F11/07

Abstract: An operating method of a nonvolatile memory device for programming multi-page data, the operating method including: receiving the multi-page data from a memory controller; programming first page data among the multi-page data to first memory cells connected to a word line adjacent to a selected word line; reading previous page data previously stored in second memory cells connected to the selected word line based on a first sensing value and a second sensing value after programming the first page data, calculating a first fail bit number by comparing first bits of the previous page data read based on the first sensing value to second bits of the previous page data read based on the second sensing value; and programming the previous page data read from the second memory cells and second page data among the multi-page data to the second memory cells based on the first fail bit number.

公开(公告)号：US20210097010A1

公开(公告)日：2021-04-01

申请号：US16835922

申请日：2020-03-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinyoung KIM ,  Jaeduk YU

IPC: G06F13/16 ,  G06F11/07 ,  G11C11/56 ,  G11C7/20 ,  G01R31/28

Abstract: To control initialization of a nonvolatile memory device, before assembling a memory system including a first nonvolatile memory device and a second nonvolatile memory device, information data for initialization of the first nonvolatile memory device are stored in the first nonvolatile memory device. After assembling the memory system, the information data are moved from the first nonvolatile memory device to the second nonvolatile memory device. The first nonvolatile memory device is initialized based on the information data stored in the second nonvolatile memory device. An initialization time of the first nonvolatile memory device is reduced efficiently by moving the information data from the first nonvolatile memory device to the second nonvolatile memory device having the rapid speed of the reading operation and using the information data read from the second nonvolatile memory device.

公开(公告)号：US20210020236A1

公开(公告)日：2021-01-21

申请号：US16745823

申请日：2020-01-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongmin BAEK ,  Jinyoung KIM ,  Junho SHIN

IPC: G11C13/00 ,  H01L27/24

Abstract: A resistive memory includes a memory cell array, a write/read circuitry and a control circuitry. The memory cell array includes a plurality of resistive memory cells coupled to a plurality of word-lines and a plurality of bit-lines. The write/read circuitry is coupled to the memory cell array through a row decoder and a column decoder, the write/read circuitry performs a write operation to write write data in a target page of the memory cell array, and verifies the write operation by comparing read data read from the target page with the write data. The control circuitry controls at least one of the row decoder, the column decoder and the write/read circuitry to control a resistance which a selected memory cell experiences according to a distance from an access point to the selected memory cell in the memory cell array based on an address.