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    Method of encapsulating a substrate-based package assembly without causing mold flash
    33.
    发明申请
    Method of encapsulating a substrate-based package assembly without causing mold flash 有权
    封装基于衬底的封装组件而不引起模具闪光的方法

    公开(公告)号：US20020074690A1

    公开(公告)日：2002-06-20

    申请号：US09737673

    申请日：2000-12-15

    Applicant: Siliconware Precision Industries Co., Ltd

    Inventor： Chien-Ping Huang

    IPC: B29C070/72

    CPC classification number: H01L21/565 ,  B29C43/18 ,  B29C45/0025 ,  B29C45/0046 ,  B29C45/14655 ,  B29C70/70 ,  B29C2045/0036 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/16225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

    Abstract: An improved encapsulation method is proposed for the encapsulation of a substrate-based package assembly, which can help to prevent mold flash over exposed package surfaces after encapsulation process is completed. The proposed encapsulation method is characterized by the forming of a cutaway portion in a solder mask over the substrate along a seam line between the solder mask and the molding tool that would exist between the solder mask and the molding tool when the semi-finished package assembly is fixed in position in the molding tool. During encapsulation process, the cutaway portion defines a constricted flow passage to the injected encapsulation material; and consequently, when the encapsulation material flows into this constricted flow passage, it would more quickly absorb the heat in the molding tool, thereby increasing its viscosity and retarding its flow speed. As a result, the encapsulation material would be less likely to further flow into the seam between the solder mask and the molding tool, thus preventing mold flash over the exposed surface of the solder mask.

    Abstract translation: 提出了一种改进的封装方法，用于封装基于衬底的封装组件，这可以有助于防止在封装工艺完成之后暴露的封装表面上的模具闪光。 所提出的封装方法的特征在于，当焊料掩模和成型工具之间的接缝线在焊接掩模和成型工具之间时，当半成品封装组件 固定在成型工具中的适当位置。 在封装过程中，切口部分限定到注入的封装材料的收缩流动通道; 因此，当封装材料流入该收缩流路时，将更快地吸收模具中的热量，从而增加其粘度并延缓其流动速度。 结果，封装材料将不太可能进一步流入焊接掩模和模制工具之间的接缝中，从而防止模子在焊接掩模的暴露表面上闪光。

    Semiconductor package with heat dissipating structure
    34.
    发明申请
    Semiconductor package with heat dissipating structure 有权
    具有散热结构的半导体封装

    公开(公告)号：US20040164404A1

    公开(公告)日：2004-08-26

    申请号：US10787269

    申请日：2004-02-25

    Applicant: Siliconware Precision Industries Co., Ltd.

    Inventor： Chien-Ping Huang

    IPC: H01L023/10

    CPC classification number: H01L23/4334 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

    Abstract: A semiconductor package with a heat dissipating structure is provided. The heat dissipating structure includes a flat portion, and a plurality of support portions formed at edge corners of the flat portion for supporting the flat portion above a chip mounted on a substrate. The support portions are mounted at predetermined area on the substrate without interfering with arrangement of the chip and bonding wires that electrically connect the chip to the substrate. The support portions are arranged to form a space embraced by adjacent supports and the flat portion, so as to allow the bonding wires to pass through the space to reach area on the substrate outside coverage of the heat dissipating structure; besides, passive components or other electronic components can be mounted on the substrate at area within or outside the coverage of the heat dissipating structure, thereby improving flexibility in component arrangement in the semiconductor package.

    Abstract translation: 提供具有散热结构的半导体封装。 散热结构包括平坦部分和形成在平坦部分的边缘角部处的多个支撑部分，用于将平坦部分支撑在安装在基板上的芯片上。 支撑部分安装在基板上的预定区域上，而不干扰将芯片与基板电连接的芯片和接合线的布置。 支撑部分被布置成形成由相邻支撑件和平坦部分包围的空间，以便使接合线通过该空间以到达散热结构外部覆盖层上的基板上的区域; 此外，无源部件或其他电子部件可以在散热结构的覆盖范围内或外部的区域处安装在基板上，从而提高半导体封装中的部件布置的灵活性。

    Semiconductor package having a die pad with downward extended tabs
    35.
    发明申请
    Semiconductor package having a die pad with downward extended tabs 审中-公开
    半导体封装具有具有向下延伸突片的管芯焊盘

    公开(公告)号：US20040046267A1

    公开(公告)日：2004-03-11

    申请号：US10653871

    申请日：2003-09-03

    Applicant: Siliconware Precision Industries Co., Ltd.

    Inventor： Chien-Ping Huang

    IPC: H01L023/28

    CPC classification number: H01L23/49503 ,  H01L21/565 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2224/05599 ,  H01L2924/00012

    Abstract: A semiconductor package having a lead frame formed with a die pad and a plurality of conductive leads, wherein the die pad is formed with a plurality of tabs to impede the resin flow below the die pad such that a downward pressure is produced because the resin flow above the die pad moves at a speed faster than that below the die pad. As a result, the tab is urged against a bottom surface of a mold cavity during a transfer molding process so as to prevent the die pad from being exposed to an encapsulant for encapsulating the die pad and a semiconductor die mounted on the die pad.

    Abstract translation: 一种半导体封装，其具有形成有管芯焊盘和多个导电引线的引线框架，其中，所述管芯焊盘形成有多个突出部，以阻止所述管芯焊盘下方的树脂流动，从而由于树脂流动而产生向下的压力 管芯焊盘上方的移动速度高于管芯焊盘的速度。 结果，在传递模制过程中，突片被迫抵靠模具腔的底表面，以防止芯片焊盘暴露于用于封装芯片焊盘的密封剂和安装在芯片焊盘上的半导体芯片。

    Semiconductor package
    39.
    发明申请
    Semiconductor package 有权
    半导体封装

    公开(公告)号：US20030057534A1

    公开(公告)日：2003-03-27

    申请号：US09962596

    申请日：2001-09-25

    Applicant: Siliconware Precision Industries Co., Ltd.

    Inventor： Tzong-Da Ho ,  Chien-Ping Huang

    IPC: H01L023/02

    CPC classification number: H01L23/3128 ,  H01L23/3677 ,  H01L23/4334 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

    Abstract: A semiconductor package is proposed, in which at least one chip is mounted on a substrate, and at least one die-attach region is formed on the substrate. A plurality of thermal vias formed in the die-attach region and penetrating the substrate, in a manner that the thermal vias each has a top end connected to the chip mounted on the substrate and a bottom end connected to a thermal pad formed beneath the substrate at a position corresponding to the die-attach region. The thermal pad has a surface directly exposed to the atmosphere, allowing heat generated by the chip to be dissipated through the thermal vias and the exposed surface of the thermal pad to the atmosphere, so as to significantly improve heat dissipating efficiency for the semiconductor package.

    Abstract translation: 提出了一种半导体封装，其中至少一个芯片安装在基板上，并且在该基板上形成至少一个管芯附着区域。 形成在芯片附着区域中并穿透基板的多个热通孔以热通孔各自具有连接到安装在基板上的芯片的顶端和连接到形成在基板下方的热垫的底端 在与芯片附着区域对应的位置。 散热垫具有直接暴露在大气中的表面，允许由芯片产生的热量通过热通孔和散热垫的暴露表面散发到大气中，从而显着提高半导体封装的散热效率。

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