公开(公告)号：US11990541B2

公开(公告)日：2024-05-21

申请号：US18124490

申请日：2023-03-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong Chern

IPC: H01L29/778 ,  H01L27/07 ,  H01L29/66 ,  H03K17/567

CPC classification number: H01L29/7787 ,  H01L27/0727 ,  H01L29/66462 ,  H03K17/567

Abstract: Apparatus and circuits with dual polarization transistors and methods of fabricating the same are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a substrate; an active layer that is formed over the substrate and comprises a first active portion having a first thickness and a second active portion having a second thickness; a first transistor comprising a first source region, a first drain region, and a first gate structure formed over the first active portion and between the first source region and the first drain region; and a second transistor comprising a second source region, a second drain region, and a second gate structure formed over the second active portion and between the second source region and the second drain region, wherein the first thickness is different from the second thickness.

公开(公告)号：US20230400639A1

公开(公告)日：2023-12-14

申请号：US18232319

申请日：2023-08-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Hsiang HSU ,  Chewn-Pu Jou ,  Chan-Hong Chern ,  Cheng-Tse Tang ,  Yung-Jr Hung ,  Lan-Chou Cho

IPC: G02B6/30

CPC classification number: G02B6/305

Abstract: Disclosed are edge couplers having a high coupling efficiency and low polarization dependent loss, and methods of making the edge couplers. In one embodiment, a semiconductor device for optical coupling is disclosed. The semiconductor device includes: a substrate; an optical waveguide over the substrate; and a plurality of layers over the optical waveguide. The plurality of layers includes a plurality of coupling pillars disposed at an edge of the semiconductor device. The plurality of coupling pillars form an edge coupler configured for optically coupling the optical waveguide to an optical fiber placed at the edge of the semiconductor device.

公开(公告)号：US20230375862A1

公开(公告)日：2023-11-23

申请号：US18363489

申请日：2023-08-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Weiwei Song ,  Stefan Rusu ,  Chan-Hong Chern ,  Chih-Chang Lin

IPC: G02F1/025 ,  G02F1/225

CPC classification number: G02F1/025 ,  G02F1/2255 ,  G02F1/2257 ,  G02F2201/508 ,  G02F2201/58

Abstract: A semiconductor device include: a first bus waveguide; a first silicon ring optically coupled to the first bus waveguide; a backup silicon ring optically coupled to the first bus waveguide; a first heater and a second heater configured to heat the first silicon ring and the backup silicon ring, respectively; and a first switch, where the first switch is configured to electrically couple the first silicon ring to a first radio frequency (RF) circuit when the first switch is at a first switching position, and is configured to electrically couple the backup silicon ring to the first RF circuit when the first switch is at a second switching position.

公开(公告)号：US11796739B2

公开(公告)日：2023-10-24

申请号：US17461534

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Hsiang Hsu ,  Chewn-Pu Jou ,  Chan-Hong Chern ,  Cheng-Tse Tang ,  Yung-Jr Hung ,  Lan-Chou Cho

IPC: G02B6/30

CPC classification number: G02B6/305

Abstract: Disclosed are edge couplers having a high coupling efficiency and low polarization dependent loss, and methods of making the edge couplers. In one embodiment, a semiconductor device for optical coupling is disclosed. The semiconductor device includes: a substrate; an optical waveguide over the substrate; and a plurality of layers over the optical waveguide. The plurality of layers includes a plurality of coupling pillars disposed at an edge of the semiconductor device. The plurality of coupling pillars form an edge coupler configured for optically coupling the optical waveguide to an optical fiber placed at the edge of the semiconductor device.

公开(公告)号：US11682676B2

公开(公告)日：2023-06-20

申请号：US16575808

申请日：2019-09-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong Chern

IPC: H01L27/095 ,  H01L29/20 ,  H01L29/778 ,  H01L29/49 ,  H01L29/205 ,  H01L29/66 ,  H01L29/423 ,  H01L21/8252 ,  H01L21/02 ,  H03K17/16

CPC classification number: H01L27/095 ,  H01L21/0254 ,  H01L21/8252 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/4958 ,  H01L29/66462 ,  H01L29/7787 ,  H03K17/161 ,  H01L21/02381 ,  H01L29/42316

Abstract: Apparatus and circuits with dual threshold voltage transistors and methods of fabricating the same are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a first layer comprising a first III-V semiconductor material formed over the substrate; a first transistor formed over the first layer, and a second transistor formed over the first layer. The first transistor comprises a first gate structure comprising a first material, a first source region and a first drain region. The second transistor comprises a second gate structure comprising a second material, a second source region and a second drain region. The first material is different from the second material.

公开(公告)号：US11680978B2

公开(公告)日：2023-06-20

申请号：US17039627

申请日：2020-09-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Ann Lai ,  Ruo-Rung Huang ,  Kun-Lung Chen ,  Chun-Yi Yang ,  Chan-Hong Chern

IPC: G01R31/26 ,  H03K17/687 ,  G01R31/27 ,  H03K3/017

CPC classification number: G01R31/2621 ,  G01R31/27 ,  H03K3/017 ,  H03K17/6871 ,  H03K2217/0063 ,  H03K2217/0072

Abstract: An apparatus and method for testing gallium nitride field effect transistors (GaN FETs) are disclosed herein. In some embodiments, the apparatus includes: a high side GaN FET, a low side GaN FET, a high side driver coupled to a gate of the high side GaN FET, a low side driver coupled to a gate of the low side GaN FET, and a driver circuit coupled to the high side and low side drivers and configured to generate drive signals capable of driving the high and low side GaN FETs, wherein the high and low side GaN FETs and transistors, within the high and low side drivers and the driver circuit, are patterned on a same semiconductor device layer during a front-end-of-line (FEOL) process.

公开(公告)号：US11581310B2

公开(公告)日：2023-02-14

申请号：US17330851

申请日：2021-05-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong Chern

IPC: H01L27/088 ,  H01L29/778 ,  H03K17/687 ,  H01L21/8252 ,  H01L29/43 ,  H01L29/66

Abstract: Apparatus and circuits including transistors with different threshold voltages and methods of fabricating the same are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a substrate; an active layer that is formed over the substrate and comprises a plurality of active portions; a polarization modulation layer comprising a plurality of polarization modulation portions each of which is disposed on a corresponding one of the plurality of active portions; and a plurality of transistors each of which comprises a source region, a drain region, and a gate structure formed on a corresponding one of the plurality of polarization modulation portions. The transistors have at least three different threshold voltages.

公开(公告)号：US11525957B2

公开(公告)日：2022-12-13

申请号：US17150628

申请日：2021-01-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Weiwei Song ,  Chan-Hong Chern ,  Chih-Chang Lin ,  Stefan Rusu ,  Min-Hsiang Hsu

IPC: G02B6/124 ,  G02B6/132 ,  G02B6/122 ,  B29D11/00 ,  G02B6/12

Abstract: Methods of fabricating optical devices with high refractive index materials are disclosed. The method includes forming a first oxide layer on a substrate and forming a patterned template layer with first and second trenches on the first oxide layer. A material of the patterned template layer has a first refractive index. The method further includes forming a first portion of a waveguide and a first portion of an optical coupler within the first and second trenches, respectively, forming a second portion of the waveguide and a second portion of the optical coupler on a top surface of the patterned template layer, and depositing a cladding layer on the second portions of the waveguide and optical coupler. The waveguide and the optical coupler include materials with a second refractive index that is greater than the first refractive index.

公开(公告)号：US11245030B2

公开(公告)日：2022-02-08

申请号：US16601790

申请日：2019-10-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong Chern

IPC: H01L29/778 ,  H01L27/085 ,  H01L29/66 ,  H01L29/205

Abstract: Apparatus and circuits including transistors with different polarizations and methods of fabricating the same are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a substrate; an active layer that is formed over the substrate and comprises a first active portion and a second active portion; a first transistor comprising a first source region, a first drain region, and a first gate structure formed over the first active portion and between the first source region and the first drain region; and a second transistor comprising a second source region, a second drain region, and a second gate structure formed over the second active portion and between the second source region and the second drain region, wherein the first active portion has a material composition different from that of the second active portion.

公开(公告)号：US20210226611A1

公开(公告)日：2021-07-22

申请号：US17221893

申请日：2021-04-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong Chern ,  Kun-Lung Chen

IPC: H03K3/011 ,  H03K3/356

Abstract: Various embodiments of the present application are directed towards a level shifter with temperature compensation. In some embodiments, the level shifter comprises a transistor, a first resistor, and a second resistor. The first resistor is electrically coupled from a first source/drain of the transistor to a supply node, and the second resistor is electrically coupled from a second source/drain of the transistor to a reference node. Further, the first and second resistors have substantially the same temperature coefficients and comprise group III-V semiconductor material. By having both the first and second resistors, the output voltage of the level shifter is defined by the resistance ratio of the resistors. Further, since the first and second resistors have the same temperature coefficients, temperature induced changes in resistance is largely cancelled out in the ratio and the output voltage is less susceptible to temperature induced change than the first and second resistors individually.