公开(公告)号：US10535664B2

公开(公告)日：2020-01-14

申请号：US16012744

申请日：2018-06-19

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Po-Chun Chen ,  Wei-Hsin Liu ,  Chia-Lung Chang ,  Yi-Wei Chen ,  Han-Yung Tsai

IPC: H01L21/336 ,  H01L27/108 ,  H01L29/66 ,  H01L21/02 ,  H01L21/265 ,  H01L21/266 ,  H01L29/78

Abstract: A method of changing a formation rate of silicon oxide includes providing a substrate, wherein two conductive lines are disposed on the substrate and a recess is between the conductive lines. Later, a cleaning process is performed to clean the substrate and the conductive lines using diluted hydrofluoric acid. After the cleaning process, a silicon oxide layer is formed to cover a sidewall and a bottom of the recess, wherein a formation rate of the silicon oxide layer at the bottom of the recess is greater than a formation rate of the silicon oxide layer at the sidewall of the recess.

公开(公告)号：US20190363093A1

公开(公告)日：2019-11-28

申请号：US16012744

申请日：2018-06-19

Applicant: United Microelectronics Corp. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Po-Chun Chen ,  Wei-Hsin Liu ,  Chia-Lung Chang ,  Yi-Wei Chen ,  Han-Yung Tsai

IPC: H01L27/108 ,  H01L29/66 ,  H01L29/78 ,  H01L21/265 ,  H01L21/266 ,  H01L21/02

Abstract: A method of changing a formation rate of silicon oxide includes providing a substrate, wherein two conductive lines are disposed on the substrate and a recess is between the conductive lines. Later, a cleaning process is performed to clean the substrate and the conductive lines using diluted hydrofluoric acid. After the cleaning process, a silicon oxide layer is formed to cover a sidewall and a bottom of the recess, wherein a formation rate of the silicon oxide layer at the bottom of the recess is greater than a formation rate of the silicon oxide layer at the sidewall of the recess.

公开(公告)号：US10475900B2

公开(公告)日：2019-11-12

申请号：US15869005

申请日：2018-01-11

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Kai-Jiun Chang ,  Tsun-Min Cheng ,  Chih-Chieh Tsai ,  Jui-Min Lee ,  Yi-Wei Chen ,  Chia-Lung Chang ,  Wei-Hsin Liu

IPC: H01L29/49 ,  H01L21/285 ,  H01L29/66 ,  H01L27/108 ,  H01L21/28

Abstract: A method for manufacturing a semiconductor device with a cobalt silicide film is provided in the present invention. The method includes the steps of providing a silicon structure with an interlayer dielectric formed thereon, forming a contact hole in the interlayer dielectric to expose the silicon structure, depositing a cobalt film on the exposed silicon structure at a temperature between 300° C.-400° C., wherein a cobalt protecting film is in-situ formed on the surface of the cobalt film, performing a rapid thermal process to transform the cobalt film into a cobalt silicide film, and removing untransformed cobalt film.

公开(公告)号：US20190287976A1

公开(公告)日：2019-09-19

申请号：US15959291

申请日：2018-04-23

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Chih-Chien Liu ,  Tzu-Chin Wu ,  Po-Chun Chen ,  Chia-Lung Chang

IPC: H01L27/108 ,  H01L21/8234 ,  H01L21/02

Abstract: A fabricating method of a stop layer includes providing a substrate. The substrate is divided into a memory region and a peripheral circuit region. Two conductive lines are disposed within the peripheral circuit region. Then, an atomic layer deposition is performed to form a silicon nitride layer to cover the conductive lines. Later, after forming the silicon nitride layer, a silicon carbon nitride layer is formed to cover the silicon nitride layer. The silicon carbon nitride layer serves as a stop layer.

公开(公告)号：US20190148382A1

公开(公告)日：2019-05-16

申请号：US15810145

申请日：2017-11-13

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Chih-Chien Liu ,  Chia-Lung Chang ,  Han-Yung Tsai ,  Tzu-Chin Wu

IPC: H01L27/108 ,  H01L21/285

CPC classification number: H01L27/10852 ,  H01L21/28556 ,  H01L27/10814 ,  H01L27/10823

Abstract: A method of manufacturing memory devices is provided in the present invention. The method includes the steps of providing a substrate with multiple capacitors, wherein the capacitor includes a lower electrode layer, an insulating layer and an upper electrode layer and a top plate, forming a tungsten layer on the upper electrode, performing a nitriding plasma treatment to the tungsten layer to form a tungsten nitride layer, and forming a pre-metal dielectric layer on the tungsten nitride layer.

公开(公告)号：US10262895B2

公开(公告)日：2019-04-16

申请号：US15859766

申请日：2018-01-02

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Mei-Ling Chen ,  Wei-Hsin Liu ,  Yi-Wei Chen ,  Chia-Lung Chang ,  Jui-Min Lee ,  Ching-Hsiang Chang ,  Tzu-Chin Wu ,  Shih-Fang Tzou

IPC: H01L21/02 ,  H01L21/768 ,  H01L27/108 ,  H01L21/8234 ,  H01L49/02

Abstract: The present invention provides a method for fabricating a semiconductor device, comprising at least the steps of: providing a substrate in which a memory region and a peripheral region are defined, the memory region includes a plurality of memory cells, each memory cell includes at least a first transistor and a capacitor, the peripheral region compress a second transistor, a first insulating layer is formed within the memory region and the peripheral region by an atomic layer deposition process, covering the capacitor of the memory cells in the memory region and the second transistor in the peripheral region, and a second insulating layer is formed, overlying the first insulating layer and the peripheral region. Finally, a contact structure is formed within the second insulating layer, and electrically connecting the second transistor.

公开(公告)号：US20180212034A1

公开(公告)日：2018-07-26

申请号：US15869005

申请日：2018-01-11

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Kai-Jiun Chang ,  Tsun-Min Cheng ,  Chih-Chieh Tsai ,  Jui-Min Lee ,  Yi-Wei Chen ,  Chia-Lung Chang ,  Wei-Hsin Liu

IPC: H01L29/49 ,  H01L29/66 ,  H01L21/28 ,  H01L21/285 ,  H01L27/108

Abstract: A method for manufacturing a semiconductor device with a cobalt silicide film is provided in the present invention. The method includes the steps of providing a silicon structure with an interlayer dielectric formed thereon, forming a contact hole in the interlayer dielectric to expose the silicon structure, depositing a cobalt film on the exposed silicon structure at a temperature between 300° C-400° C., wherein a cobalt protecting film is in-situ formed on the surface of the cobalt film, performing a rapid thermal process to transform the cobalt film into a cobalt silicide film, and removing untransformed cobalt film.

公开(公告)号：US09034726B2

公开(公告)日：2015-05-19

申请号：US14285645

申请日：2014-05-23

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chih-Chien Liu ,  Chia-Lung Chang ,  Jei-Ming Chen ,  Jui-Min Lee ,  Yuh-Min Lin

IPC: H01L21/762 ,  H01L29/06

CPC classification number: H01L21/76224 ,  H01L29/0649

Abstract: A semiconductor structure is located in a recess of a substrate. The semiconductor structure includes a liner, a silicon rich layer and a filling material. The liner is located on the surface of the recess. The silicon rich layer is located on the liner. The filling material is located on the silicon rich layer and fills the recess. Furthermore, a semiconductor process forming said semiconductor structure is also provided.

Abstract translation: 半导体结构位于衬底的凹部中。 半导体结构包括衬垫，富硅层和填充材料。 衬垫位于凹槽的表面上。 富硅层位于衬套上。 填充材料位于富硅层上并填充凹槽。 此外，还提供了形成所述半导体结构的半导体工艺。