公开(公告)号：US20140300391A1

公开(公告)日：2014-10-09

申请号：US13858927

申请日：2013-04-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chang-Tzu Wang ,  Ping-Chen Chang ,  Tien-Hao Tang

IPC: H03K3/013

CPC classification number: H03K19/00 ,  H01L27/0207 ,  H01L27/0738 ,  H01L27/088 ,  H01L27/092 ,  H03K19/00361

Abstract: An output buffer includes an input/output end, a voltage source, a first transistor and a second transistor. The first transistor includes a first end coupled to the input/output end, a second end coupled to the voltage source, and a control end coupled to the voltage source. The second transistor includes a first end coupled to the input/output end, a second end coupled to the voltage source, and a control end coupled to the voltage source. The control end of the first transistor and the control end of the second transistor are substantially perpendicular to each other, and the punch through voltage of the first transistor is higher than the punch through voltage of the second transistor.

Abstract translation: 输出缓冲器包括输入/​​输出端，电压源，第一晶体管和第二晶体管。 第一晶体管包括耦合到输入/输出端的第一端，耦合到电压源的第二端和耦合到电压源的控制端。 第二晶体管包括耦合到输入/输出端的第一端，耦合到电压源的第二端和耦合到电压源的控制端。 第一晶体管的控制端和第二晶体管的控制端基本上彼此垂直，并且第一晶体管的穿通电压高于第二晶体管的穿通电压。