Abstract:
A method of estimating a channel response of a channel is provided that includes transforming a frequency domain signal received via the channel into a time domain signal and searching the time domain signal for a location of minimum energy. The method also includes padding the time domain signal with zeroes at the location of minimum energy and transforming the padded time domain signal to a second frequency domain signal. The second frequency domain signal is used as an estimated channel response for the channel.
Abstract:
A Digital Radio Mondiale (DRM) receiver and demodulation method includes an analog and digital separation filter for filtering and separating a DRM-encoded signal and a non DRM-encoded signal from a composite RF signal received at the receiver. The DRM receiver includes a programmable downsampler and a programmable N-point Fast Fourier Transform (FFT) to recover and demodulate the OFDM symbols in a received DRM-encoded RF signal. The received signal is digitally sampled at a rate operably integer downsampled to achieve a number N samples in the useful portion of the OFDM symbol for input to an N-point FFT, where N equal to a power of two. The downsampling rate and size (N-points) of the FFT depend on the DRM encoding and transmission parameters, notably the robustness mode and spectrum occupancy. The structure and operation of the receiver in this manner simplifies the design and reduces the required filter order of the analog and digital separation filter.
Abstract:
A driver for a DC-to-DC converter that may utilize a flyback or buck-boost converter circuit. The driver includes a driver circuit and an interface circuit. The interface circuit has a sensor sensing an input voltage from a DC supply and generating a sensor signal to a driver selector. The driver selector compares the sensor signal to a comparison voltage to determine the type of converter circuit and then transmits a selector signal to a driver circuit where it is used to control one or more of the components of the driver circuit, such as the logic circuit which is used for driving the converter to regulate the converter output. The sensor includes a sense resistor along with a current-sense amplifier, which is adapted for connection to a high side or a low side of a power supply while still producing a substantially equivalent output voltage or sensor signal.
Abstract:
A system and method for estimating sample clock frequency offset (εs) in a digital radio mondiale (DRM) system such as, for example, DRM receivers. The system and method includes using a relationship given by the following equation: ɛ s = linearfit ( angle ( P G m P G_tr m P G m - cycle P G_tr m - cycle ) , l ) × N 2 π × cycle × ( N + L ) wherein the PGm is the gain pilot received in the mth symbol and PG—trm is the gain pilot transmitted in the mth symbol, the PGm-cycle is the gain pilot received in (m-cycle)th symbol, the PG—trm-cycle is the second gain pilot transmitted in (m-cycle)th symbol, the l is the index of the sub-carrier associated with the gain pilot, the N is a factor of a sample point number of a useful symbol, the L is a sample point number of a guard interval, and the cycle is the interval of two symbols which are inserted gain pilots at the same sub-carriers (l).
Abstract:
An audio amplifier device includes a power supply having an output for providing a supply voltage, a voltage divider connected to the output of the power supply for providing a divided supply voltage, and an audio amplifier that further includes a supply voltage rejection circuit. The audio amplifier has a first input for receiving an input audio signal, a second input for receiving the supply voltage, a third input for receiving a supply voltage rejection signal for the supply voltage rejection circuit, and an output for providing an output audio signal. A power-off noise suppression circuit has a first input for receiving the divided supply voltage and an output for providing the supply voltage rejection signal. The power-off noise suppression circuit sets the supply voltage rejection signal equal to the divided supply voltage during power-off of the power supply so that a rate of decrease of the supply voltage is greater than a rate of decrease of the supply voltage rejection signal for reducing noise in the output audio signal during the power-off.