Channel equalization in a receiver
    31.
    发明授权
    Channel equalization in a receiver 有权
    接收机中的信道均衡

    公开(公告)号:US08488689B2

    公开(公告)日:2013-07-16

    申请号:US12079950

    申请日:2008-03-28

    Applicant: Yan Liu

    Inventor: Yan Liu

    Abstract: A method of estimating a channel response of a channel is provided that includes transforming a frequency domain signal received via the channel into a time domain signal and searching the time domain signal for a location of minimum energy. The method also includes padding the time domain signal with zeroes at the location of minimum energy and transforming the padded time domain signal to a second frequency domain signal. The second frequency domain signal is used as an estimated channel response for the channel.

    Abstract translation: 提供一种估计信道的信道响应的方法,包括将经由信道接收的频域信号变换为时域信号,并搜索时域信号以获得最小能量的位置。 该方法还包括以最小能量的位置填充时域信号,并将填充的时域信号变换为第二频域信号。 第二频域信号用作信道的估计信道响应。

    DRM receiver with analog and digital separation filter and demodulation method
    32.
    发明授权
    DRM receiver with analog and digital separation filter and demodulation method 有权
    DRM接收机采用模拟和数字分离滤波器和解调方式

    公开(公告)号:US08208365B2

    公开(公告)日:2012-06-26

    申请号:US12079927

    申请日:2008-03-28

    CPC classification number: H04L27/265 H04H2201/12 H04L27/0008

    Abstract: A Digital Radio Mondiale (DRM) receiver and demodulation method includes an analog and digital separation filter for filtering and separating a DRM-encoded signal and a non DRM-encoded signal from a composite RF signal received at the receiver. The DRM receiver includes a programmable downsampler and a programmable N-point Fast Fourier Transform (FFT) to recover and demodulate the OFDM symbols in a received DRM-encoded RF signal. The received signal is digitally sampled at a rate operably integer downsampled to achieve a number N samples in the useful portion of the OFDM symbol for input to an N-point FFT, where N equal to a power of two. The downsampling rate and size (N-points) of the FFT depend on the DRM encoding and transmission parameters, notably the robustness mode and spectrum occupancy. The structure and operation of the receiver in this manner simplifies the design and reduces the required filter order of the analog and digital separation filter.

    Abstract translation: 数字无线电广播(DRM)接收机和解调方法包括模拟和数字分离滤波器,用于从在接收机处接收的复合RF信号过滤和分离DRM编码信号和非DRM编码信号。 DRM接收机包括可编程下行采样器和可编程N点快速傅里叶变换(FFT),以在接收的DRM编码RF信号中恢复和解调OFDM符号。 接收到的信号以可操作的整数下采样的速率进行数字采样,以在OFDM符号的有用部分中实现N个采样,以输入到N点FFT,其中N等于2的幂。 FFT的下采样率和大小(N点)取决于DRM编码和传输参数,特别是鲁棒性模式和频谱占用。 以这种方式,接收机的结构和操作简化了设计,并减少了模拟和数字分离滤波器所需的滤波器顺序。

    Driver with control interface facilitating use of the driver with varied DC-to-DC converter circuits
    33.
    发明授权
    Driver with control interface facilitating use of the driver with varied DC-to-DC converter circuits 有权
    具有控制接口的驱动器,便于使用具有变化的DC-DC转换器电路的驱动器

    公开(公告)号:US07459894B2

    公开(公告)日:2008-12-02

    申请号:US11104909

    申请日:2005-04-13

    CPC classification number: H02M3/156 H02M3/33507

    Abstract: A driver for a DC-to-DC converter that may utilize a flyback or buck-boost converter circuit. The driver includes a driver circuit and an interface circuit. The interface circuit has a sensor sensing an input voltage from a DC supply and generating a sensor signal to a driver selector. The driver selector compares the sensor signal to a comparison voltage to determine the type of converter circuit and then transmits a selector signal to a driver circuit where it is used to control one or more of the components of the driver circuit, such as the logic circuit which is used for driving the converter to regulate the converter output. The sensor includes a sense resistor along with a current-sense amplifier, which is adapted for connection to a high side or a low side of a power supply while still producing a substantially equivalent output voltage or sensor signal.

    Abstract translation: 用于DC-DC转换器的驱动器,其可以利用反激式或降压 - 升压转换器电路。 驱动器包括驱动电路和接口电路。 接口电路具有感测来自直流电源的输入电压并且向驱动器选择器产生传感器信号的传感器。 驱动器选择器将传感器信号与比较电压进行比较以确定转换器电路的类型,然后将选择器信号发送到用于控制驱动器电路的一个或多个部件的驱动器电路,例如逻辑电路 用于驱动转换器来调节转换器输出。 传感器包括检测电阻器以及电流检测放大器,其适于连接到电源的高侧或低侧,同时仍然产生基本相等的输出电压或传感器信号。

    Sample clock frequency offset estimation in DRM

    公开(公告)号:US20080279313A1

    公开(公告)日:2008-11-13

    申请号:US12079937

    申请日:2008-03-28

    Applicant: Yan Liu

    Inventor: Yan Liu

    CPC classification number: H04L27/2657 H04L27/2675

    Abstract: A system and method for estimating sample clock frequency offset (εs) in a digital radio mondiale (DRM) system such as, for example, DRM receivers. The system and method includes using a relationship given by the following equation: ɛ s = linearfit ( angle  ( P G m P G_tr m P G m  -  cycle P G_tr m  -  cycle ) , l ) × N 2  π × cycle × ( N + L ) wherein the PGm is the gain pilot received in the mth symbol and PG—trm is the gain pilot transmitted in the mth symbol, the PGm-cycle is the gain pilot received in (m-cycle)th symbol, the PG—trm-cycle is the second gain pilot transmitted in (m-cycle)th symbol, the l is the index of the sub-carrier associated with the gain pilot, the N is a factor of a sample point number of a useful symbol, the L is a sample point number of a guard interval, and the cycle is the interval of two symbols which are inserted gain pilots at the same sub-carriers (l).

    Power-off noise suppression circuit and associated methods for an audio amplifier device
    35.
    发明申请
    Power-off noise suppression circuit and associated methods for an audio amplifier device 有权
    断电噪声抑制电路及音频放大器装置的相关方法

    公开(公告)号:US20020141603A1

    公开(公告)日:2002-10-03

    申请号:US10038848

    申请日:2001-12-31

    CPC classification number: H03F1/305 H03G3/348

    Abstract: An audio amplifier device includes a power supply having an output for providing a supply voltage, a voltage divider connected to the output of the power supply for providing a divided supply voltage, and an audio amplifier that further includes a supply voltage rejection circuit. The audio amplifier has a first input for receiving an input audio signal, a second input for receiving the supply voltage, a third input for receiving a supply voltage rejection signal for the supply voltage rejection circuit, and an output for providing an output audio signal. A power-off noise suppression circuit has a first input for receiving the divided supply voltage and an output for providing the supply voltage rejection signal. The power-off noise suppression circuit sets the supply voltage rejection signal equal to the divided supply voltage during power-off of the power supply so that a rate of decrease of the supply voltage is greater than a rate of decrease of the supply voltage rejection signal for reducing noise in the output audio signal during the power-off.

    Abstract translation: 音频放大器装置包括具有用于提供电源电压的输出的电源,连接到电源的输出的分压器,用于提供分开的电源电压,以及还包括电源电压抑制电路的音频放大器。 音频放大器具有用于接收输入音频信号的第一输入端,用于接收电源电压的第二输入端,用于接收电源电压抑制电路的电源电压抑制信号的第三输入端和用于提供输出音频信号的输出端。 断电噪声抑制电路具有用于接收划分的电源电压的第一输入端和用于提供电源电压抑制信号的输出端。 断电噪声抑制电路将电源电压抑制信号设置为等于电源断电期间的分压电源电压,使得电源电压的降低率大于电源电压抑制信号的减小率 用于在断电期间降低输出音频信号中的噪声。

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