AUTOMATIC SOLDERING SYSTEM
    41.
    发明申请
    AUTOMATIC SOLDERING SYSTEM 失效
    自动焊接系统

    公开(公告)号:US20120055975A1

    公开(公告)日:2012-03-08

    申请号:US12876217

    申请日:2010-09-06

    Abstract: An automatic soldering system includes a conveyance mechanism, a vehicle, a first part assembling mechanism, a first soldering mechanism, a turn-over mechanism, a second part assembling mechanism, a second soldering mechanism, and a control system. The vehicle is conveyed by the conveyor mechanism for carrying a workpiece. The first part assembling mechanism and the first soldering mechanism assemble and solder a first part to the primary workpiece carried by the vehicle. The turn-over mechanism turns the vehicle that is conveyed by the conveyor mechanism and carries the primary workpiece having the first part assembled thereto by a predetermined angle. The second part assembling mechanism and the second soldering mechanism assemble and solder and position a second part to the primary workpiece. The control system is electrically connected to and thus controls the first part and second part assembling mechanisms, the first and second soldering mechanisms, and the turn-over mechanism.

    Abstract translation: 自动焊接系统包括输送机构,车辆,第一部件组装机构,第一焊接机构,翻转机构,第二部分组装机构,第二焊接机构和控制系统。 车辆由用于承载工件的输送机构输送。 第一部件组装机构和第一焊接机构将第一部件组装并焊接到由车辆承载的主工件。 翻转机构转动由输送机构输送的车辆,并将具有组装在其上的第一部件的主工件承载预定角度。 第二部分组装机构和第二焊接机构组装并焊接并将第二部分定位到主工件。 控制系统电连接到控制系统,从而控制第一和第二部件组装机构,第一和第二焊接机构以及翻转机构。

    INTEGRATED INDUCTOR
    42.
    发明申请
    INTEGRATED INDUCTOR 有权
    集成电感器

    公开(公告)号:US20110304013A1

    公开(公告)日:2011-12-15

    申请号:US12953426

    申请日:2010-11-23

    Abstract: A method of fabricating an integrated inductor device includes providing a silicon substrate and forming a thickness of an insulating layer overlying the silicon substrate. The insulating layer includes a dummy structure within a portion of the thickness. The method includes forming an inductor having a first portion and a second portion. The first portion includes a spiral coil of conductor lines. The method also includes exposing the dummy structure by forming an opening in the insulating layer and removing the dummy structure to form a cavity underlying the inductor to reduce a dielectric constant and to increase a Q value of the inductor. The method includes using aluminum or copper for the dummy structures. The method includes dry etching the insulator and wet etching the dummy structure. The method also includes forming the inductors using aluminum or copper.

    Abstract translation: 制造集成电感器件的方法包括提供硅衬底并形成覆盖硅衬底的绝缘层的厚度。 绝缘层在厚度的一部分内包括虚拟结构。 该方法包括形成具有第一部分和第二部分的电感器。 第一部分包括导线的螺旋线圈。 该方法还包括通过在绝缘层中形成开口并去除虚拟结构以形成电感器下面的空腔来暴露虚拟结构,以降低介电常数并增加电感器的Q值。 该方法包括使用铝或铜作为虚拟结构。 该方法包括干法蚀刻绝缘体并湿式蚀刻虚拟结构。 该方法还包括使用铝或铜形成电感器。

    CELL WITH SURROUNDING WORD LINE STRUCTURES AND MANUFACTURING METHOD THEREOF
    44.
    发明申请
    CELL WITH SURROUNDING WORD LINE STRUCTURES AND MANUFACTURING METHOD THEREOF 审中-公开
    具有周边字线结构的单元及其制造方法

    公开(公告)号:US20110260230A1

    公开(公告)日:2011-10-27

    申请号:US12829674

    申请日:2010-07-02

    Abstract: A memory cell with surrounding word line structures includes an active area; a plurality of first trenches formed on the active area in a first direction, each first trench has a bit line on a sidewall therein; a plurality of second trenches formed on the active area in a second direction, each second trench has two word lines formed correspondingly on the sidewalls in the second trench; and a plurality of transistors formed on the active area. The word line pairs are arranged into a surrounding word line structure. The transistor is controlled by the bit line and the two word lines, thus improving the speed of the transistor.

    Abstract translation: 具有周围字线结构的存储单元包括有源区; 在第一方向上形成在有源区上的多个第一沟槽,每个第一沟槽在其侧壁上具有位线; 在第二方向上形成在有源区上的多个第二沟槽,每个第二沟槽具有相应地形成在第二沟槽中的侧壁上的两条字线; 以及形成在有源区上的多个晶体管。 字线对被排列成周围的字线结构。 晶体管由位线和两个字线控制,从而提高晶体管的速度。

    METHOD OF OCCLUSION HANDLING
    46.
    发明申请
    METHOD OF OCCLUSION HANDLING 审中-公开
    OCCLUSION处理方法

    公开(公告)号:US20110249870A1

    公开(公告)日:2011-10-13

    申请号:US12756859

    申请日:2010-04-08

    CPC classification number: H04N7/0127 H04N7/014

    Abstract: In a method of occlusion handling, a reference frame and a current frame are first provided, and at least one foreground object is determined. At least a covered region or an uncovered region with respect to the foreground object is determined. The covered region is then interpolated exclusively accordingly to the current frame, or the uncovered region is interpolated exclusively according to the reference frame.

    Abstract translation: 在遮挡处理的方法中,首先提供参考帧和当前帧,并且确定至少一个前景对象。 至少确定相对于前景物体的被覆盖区域或未覆盖区域。 然后将覆盖的区域专门内插到当前帧,或者根据参考帧专门插入未覆盖的区域。

    APPARATUS AND METHOD FOR HAZE CONTROL IN A SEMICONDUCTOR PROCESS
    47.
    发明申请
    APPARATUS AND METHOD FOR HAZE CONTROL IN A SEMICONDUCTOR PROCESS 审中-公开
    一种半导体工艺中的雾化控制装置和方法

    公开(公告)号:US20110244395A1

    公开(公告)日:2011-10-06

    申请号:US12754613

    申请日:2010-04-06

    CPC classification number: G03F7/70916 G03F1/38

    Abstract: A method for haze control in a semiconductor process, includes: providing an exposure tool with a photocatalyzer coating inside and exposing a wafer in the exposure tool in the presence of activation of the photocatalyzer coating. The photocatalyzer coating may be formed within an opaque region of a reticle.

    Abstract translation: 一种在半导体工艺中雾度控制的方法,包括:在光催化剂涂层的活化存在下,向曝光工具提供内部的光催化剂涂层并暴露于曝光工具中的晶片。 光催化剂涂层可以形成在掩模版的不透明区域内。

    TWO-CHANNEL OPERATIONAL AMPLIFIER CIRCUIT
    48.
    发明申请
    TWO-CHANNEL OPERATIONAL AMPLIFIER CIRCUIT 审中-公开
    双通道运算放大器电路

    公开(公告)号:US20110181353A1

    公开(公告)日:2011-07-28

    申请号:US12797338

    申请日:2010-06-09

    Abstract: A two-channel operational amplifier circuit includes a first operational amplifier and a second operational amplifier. In a first frame period, the two-channel operational amplifier circuit switches a first input stage, a first gain stage and a first output stage to work between a working voltage and a half working voltage, and switches a second input stage, a second gain stage and a second output stage to work between the half working voltage and a ground voltage. In a second frame period, the two-channel operational amplifier circuit switches the second input stage and the second gain stage to work between the working voltage and the half working voltage, and switches the first input stage and the first gain stage to work between the half working voltage and the ground voltage.

    Abstract translation: 双通道运算放大器电路包括第一运算放大器和第二运算放大器。 在第一帧周期中,双通道运算放大器电路切换第一输入级,第一增益级和第一输出级,以在工作电压和半工作电压之间工作,并切换第二输入级,第二增益 级和第二输出级在半工作电压和接地电压之间工作。 在第二帧周期中,双通道运算放大器电路将第二输入级和第二增益级切换到工作电压和半工作电压之间,并将第一输入级和第一增益级切换到工作电压 半工作电压和接地电压。

    SENSING CIRCUIT FOR USE WITH CAPACITIVE TOUCH PANEL
    49.
    发明申请
    SENSING CIRCUIT FOR USE WITH CAPACITIVE TOUCH PANEL 有权
    感应电路与电容式触控面板配合使用

    公开(公告)号:US20110157081A1

    公开(公告)日:2011-06-30

    申请号:US12977233

    申请日:2010-12-23

    CPC classification number: G06F3/044

    Abstract: A sensing circuit of a capacitive touch panel includes a first switch, a second switch, a third switch, a feedback capacitor, a fourth switch and an operation amplifier. The first switch and the second switch have respective first ends connected with a receiving electrode. The third switch has a first end connected with a second end of the first switch. The feedback capacitor has a first end connected with the second end of the first switch. The fourth switch has a first end connected with a second end of the feedback capacitor. The operation amplifier has a positive input terminal connected with a ground terminal, a negative input terminal connected with the fourth switch, and an output terminal connected with the second, third and fourth switches. These switches are controlled during a driving cycle of the driving signal, so that an output voltage is outputted from the operation amplifier.

    Abstract translation: 电容式触摸面板的感测电路包括第一开关,第二开关,第三开关,反馈电容器,第四开关和运算放大器。 第一开关和第二开关具有与接收电极连接的相应的第一端。 第三开关具有与第一开关的第二端连接的第一端。 反馈电容器具有与第一开关的第二端连接的第一端。 第四开关具有与反馈电容器的第二端相连的第一端。 运算放大器具有与接地端子连接的正输入端子,与第四开关连接的负输入端子以及与第二,第三和第四开关连接的输出端子。 这些开关在驱动信号的驱动周期期间被控制,从而从运算放大器输出输出电压。

    Manufacturing method for double-side capacitor of stack DRAM
    50.
    发明授权
    Manufacturing method for double-side capacitor of stack DRAM 有权
    堆叠DRAM双面电容器制造方法

    公开(公告)号:US07960241B2

    公开(公告)日:2011-06-14

    申请号:US12698322

    申请日:2010-02-02

    CPC classification number: H01L27/10852 H01L28/90

    Abstract: A manufacturing method for double-side capacitor of stack DRAM has steps of: forming a sacrificial structure in the isolating trench and the capacitor trenches; forming a first covering layer and a second covering layer on the sacrificial structure; modifying a part of the second covering layer; removing the un-modified second covering layer and the first covering layer to expose the sacrificial structure; removing the exposed part of the sacrificial structure to expose the electrode layer; removing the exposed electrode layer to expose the oxide layer; and removing the oxide layer and sacrificial structure to form the double-side capacitors.

    Abstract translation: 堆叠DRAM的双面电容器的制造方法具有以下步骤:在隔离沟槽和电容器沟槽中形成牺牲结构; 在所述牺牲结构上形成第一覆盖层和第二覆盖层; 修改第二覆盖层的一部分; 去除未改性的第二覆盖层和第一覆盖层以暴露牺牲结构; 去除所述牺牲结构的暴露部分以暴露所述电极层; 去除暴露的电极层以暴露氧化物层; 并去除氧化物层和牺牲结构以形成双面电容器。

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