中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

51 records (took 0.018 seconds)

    Multi-chip packaging using an interposer with through-vias
    42.
    发明授权
    Multi-chip packaging using an interposer with through-vias 有权
    多芯片封装采用插入式通孔

    公开(公告)号：US07841080B2

    公开(公告)日：2010-11-30

    申请号：US11755735

    申请日：2007-05-30

    Applicant: Sriram Muthukumar ,  Raul Mancera ,  Yoshihiro Tomita ,  Chi-won Hwang

    Inventor： Sriram Muthukumar ,  Raul Mancera ,  Yoshihiro Tomita ,  Chi-won Hwang

    IPC: H01K3/22

    CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L23/147 ,  H01L25/0655 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2924/10253 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49163 ,  Y10T29/49165 ,  H01L2924/00

    Abstract: One embodiment relates to forming a plurality of vias extending partially through a body, the vias including sidewalls defined by the body. An insulating layer is formed on the sidewalls and on an upper surface of the body. An electrically conductive layer is formed on the insulating layer, the electrically conductive layer defining first metal pads on the upper surface and second metal pads in contact with the first metal pads, the second metal pads having a denser pitch than the first metal pads. A dielectric layer is formed between adjacent first metal pads and between adjacent second metal pads. A plurality of electronic elements are coupled to the second metal pads. After the coupling the elements, the body is thinned through a lower surface. A portion of the insulating layer in the vias is removed and the electrically conductive layer is coupled to a substrate.

    Abstract translation: 一个实施例涉及形成多个部分地穿过主体的通孔，通孔包括由主体限定的侧壁。 绝缘层形成在主体的侧壁和上表面上。 在绝缘层上形成导电层，导电层限定上表面上的第一金属焊盘和与第一金属焊盘接触的第二金属焊盘，第二金属焊盘具有比第一金属焊盘更致密的间距。 在相邻的第一金属焊盘之间和相邻的第二金属焊盘之间形成介电层。 多个电子元件耦合到第二金属焊盘。 在连接元件之后，主体通过下表面变薄。 去除通孔中的绝缘层的一部分，并且将导电层耦合到衬底。

    Schottky diode with silver layer contacting the ZnO and MgxZn1−xO films
    45.
    发明授权
    Schottky diode with silver layer contacting the ZnO and MgxZn1−xO films 有权
    具有银层的肖特基二极管与ZnO和MgxZn1-xO膜接触

    公开(公告)号：US07400030B2

    公开(公告)日：2008-07-15

    申请号：US11042533

    申请日：2005-01-25

    Applicant: Yicheng Lu ,  Haifeng Sheng ,  Sriram Muthukumar ,  Nuri William Emanetoglu ,  Jian Zhong ,  Shaohua Liang

    Inventor： Yicheng Lu ,  Haifeng Sheng ,  Sriram Muthukumar ,  Nuri William Emanetoglu ,  Jian Zhong ,  Shaohua Liang

    IPC: H01L29/04

    CPC classification number: H01L31/0392 ,  H01L31/022408 ,  H01L31/108 ,  H01L31/1123 ,  Y02E10/50

    Abstract: In the present invention, there is provided semiconductor devices such as a Schottky UV photodetector fabricated on n-type ZnO and MgxZn1-xO epitaxial films. The ZnO and MgxZn1-xO films are grown on R-plane sapphire substrates and the Schottky diodes are fabricated on the ZnO and MgxZn1-xO films using silver and aluminum as Schottky and ohmic contact metals, respectively. The Schottky diodes have circular patterns, where the inner circle is the Schottky contact, and the outside ring is the ohmic contact. Ag Schottky contact patterns are fabricated using standard liftoff techniques, while the Al ohmic contact patterns are formed using wet chemical etching. These detectors show low frequency photoresponsivity, high speed photoresponse, lower leakage current and low noise performance as compared to their photoconductive counterparts. This invention is also applicable to optical modulators, Metal Semiconductor Field Effect Transistors (MESFETs) and more.

    Abstract translation: 在本发明中，提供了半导体器件，例如在n型ZnO和Mg x 1 Zn 1-x O O外延膜上制造的肖特基UV光电探测器。 ZnO和Mg x Zn 1-x O薄膜生长在R平面蓝宝石衬底上，肖特基二极管制造在ZnO和Mg < 分别使用银和铝作为肖特基和欧姆接触金属的ZnO 1-x O O膜。 肖特基二极管具有圆形图案，其中内圆是肖特基接触，外环是欧姆接触。 Ag肖特基接触图案使用标准剥离技术制造，而Al欧姆接触图案是使用湿化学蚀刻法形成的。 与其感光对手相比，这些检测器显示低频光响应，高速光响应，较低的漏电流和低噪声性能。 本发明还可应用于光学调制器，金属半导体场效应晶体管（MESFET）等。

    Composite metal layer formed using metal nanocrystalline particles in an electroplating bath
    48.
    发明申请
    Composite metal layer formed using metal nanocrystalline particles in an electroplating bath 审中-公开
    在电镀浴中使用金属纳米晶粒子形成复合金属层

    公开(公告)号：US20060290000A1

    公开(公告)日：2006-12-28

    申请号：US11169596

    申请日：2005-06-28

    Applicant: Wojciech Worwag ,  Sriram Muthukumar

    Inventor： Wojciech Worwag ,  Sriram Muthukumar

    IPC: H01L23/52 ,  H01L21/44 ,  C25D15/00

    CPC classification number: H01L21/76877 ,  C25D7/12 ,  C25D15/02 ,  H01L21/288 ,  H01L21/2885 ,  H01L23/53209 ,  H01L2924/0002 ,  H05K3/423 ,  H01L2924/00

    Abstract: A method for forming a composite metal layer on a substrate comprises providing nanocrystalline particles of a first metal, adding the nanocrystalline particles to a plating bath that contains ions of a second metal to form a colloid-like suspension, immersing the substrate in the plating bath, and causing a co-deposition of the second metal and the nanocrystalline particles of the first metal on the substrate to form the composite metal layer. The co-deposition may be caused by inducing a negative bias on the substrate and applying an electric current to the plating bath to induce an electroplating process. In the electroplating process, the ions of the second metal are reduced by the substrate and become co-deposited on the substrate with the nanocrystalline particles of the first metal to form the composite metal layer.

    Abstract translation: 在基板上形成复合金属层的方法包括提供第一金属的纳米晶体颗粒，将纳米晶体颗粒添加到含有第二金属离子的镀液中以形成胶体样悬浮液，将基板浸入镀浴 并且使第一金属的第二金属和纳米晶体颗粒在基底上共沉淀形成复合金属层。 共沉积可以通过在衬底上引起负偏压并将电流施加到电镀槽以引起电镀工艺而引起。 在电镀工艺中，第二金属的离子被衬底还原，并与第一金属的纳米晶体颗粒共同沉积在衬底上以形成复合金属层。

Patent Agency Ranking