Abstract:
An embodiment of the invention provides a thin film transistor substrate includes: a substrate; and a plurality of transistors, wherein each of the transistors includes a gate electrode disposed on the substrate; a first diffusion barrier layer disposed on the substrate and covering an upper surface and a ring sidewall of the gate electrode; a gate insulating layer disposed on the first diffusion barrier layer; an active layer disposed on the gate insulating layer and over the gate electrode; a source electrode disposed on the substrate and electrically connected to the active layer; a drain electrode disposed on the substrate and electrically connected to the active layer; and a protective layer covering the source electrode and the drain electrode.
Abstract:
An embodiment of the invention provides a manufacturing method of a thin-film transistor includes: providing a substrate; sequentially forming a gate electrode, a gate insulating layer, and an active layer on the substrate; forming an insulating metal oxide layer covering the active layer, wherein the insulating metal oxide layer including a metal oxide of a first metal; forming a metal layer covering the active layer, wherein the metal layer includes a second metal; forming a source electrode and a drain electrode on the metal layer with a trench separating therebetween; removing the metal layer exposed by the trench; and performing an annealing process to the metal layer and the insulating metal oxide layer, such that the metal layer reacts with the insulating metal oxide layer overlapping the metal layer to form a conducting composite metal oxide layer including the first metal and the second metal.
Abstract:
An electronic device is provided. The electronic device includes a substrate structure, a control unit, a first circuit structure, and an electronic unit. The substrate structure has a conductive via pattern and a dummy via pattern. The control unit is electrically connected to the conductive via pattern. The first circuit structure is electrically connected to the conductive via pattern. The electronic unit is electrically connected to the control unit through the first circuit structure. The dummy via pattern is electrically insulated from the first circuit structure.
Abstract:
A substrate assembly includes: a substrate; a first transistor disposed on the substrate, wherein the first transistor includes a first semiconductor layer; and a second transistor disposed on the substrate, wherein the second transistor includes a second semiconductor layer and a drain electrode electrically connected to the second semiconductor layer, and a material of the first semiconductor layer is different from a material of the second semiconductor layer, wherein the first semiconductor layer of the first transistor is electrically insulated from the drain electrode of the second transistor.
Abstract:
An electronic device including an electronic module, an inflator and an airbag is disclosed. The airbag is configured to be inflated by a gas produced by the inflator. The electronic module is disposed on the airbag and includes a first surface, a corner connecting with the first surface and a second surface opposite to the first surface. When the airbag is not inflated by the gas, at least a portion of the second surface is disposed between the first surface and the air bag, and the electronic module is at least partially overlapped with the airbag and not overlapped with the inflator in a top-view direction of the electronic module. When the airbag is inflated by the gas, the airbag contacts the corner of the electronic module, and the airbag at least partially contacts the first surface of the electronic module in the top-view direction of the electronic module.
Abstract:
An electronic device is provided. The electronic device includes a first layer, a second layer, a circuit layer, and a display medium layer. The second layer is disposed opposite to the first layer. The circuit layer is formed on the first layer. The display medium layer is disposed between the first layer and the second layer. The first layer has a first light transmission chromaticity coordinates (x1, y1) on the CIE 1931 xy chromaticity coordinates, the second layer has a second light transmission chromaticity coordinates (x2, y2) on the CIE 1931 xy chromaticity coordinates, and x1≥x2 or y1≥y2.
Abstract:
An electronic device includes a substrate, a first electronic unit, a second electronic unit, a first buffer layer, and a second buffer layer. The first electronic unit is disposed on the substrate. The second electronic unit is disposed on the substrate and adjacent to the first electronic unit. The first buffer layer is disposed on the first electronic unit and has a first curved bottom surface. The second buffer layer is disposed on the second electronic unit and has a second curved bottom surface. The width of the first curved bottom surface is different from the width of the second curved bottom surface.
Abstract:
An electronic device includes a substrate, a first silicon transistor, a second silicon transistor and a first oxide semiconductor transistor. The first silicon transistor, the second silicon transistor and the first oxide semiconductor transistor are disposed on the substrate. The first silicon transistor has a first terminal electrically connected to a first voltage level, a second terminal and a control terminal. The second silicon transistor has a first terminal electrically connected to the second terminal of the first silicon transistor, a second terminal electrically connected to a second voltage level, and a control terminal electrically connected to the control terminal of the first silicon transistor. The first oxide semiconductor transistor has a first terminal electrically connected to the first terminal of the second silicon transistor. Wherein, a voltage value of the first voltage level is greater than a voltage value of the second voltage level.
Abstract:
An electronic device is provided. The electronic device includes a first substrate, a second substrate, a first transistor and a second transistor. The second substrate is disposed on the first substrate. The first transistor is disposed on the first substrate and includes a first semiconductor layer. The second transistor is disposed on the second substrate and includes a second semiconductor layer. The first semiconductor layer includes a first channel. The second semiconductor layer includes a second channel. The width-to-length ratio of the first channel is different from the width-to-length ratio of the second channel.
Abstract:
An electronic device is provided, including a first layer, a second layer, and an electrode layer. The second layer is disposed opposite to the first layer. The electrode layer is formed on the first layer. The first layer has a first light transmission chromaticity coordinates (x1, y1), the second layer has a second light transmission chromaticity coordinates (x2, y2), and x1-x2≥0.002 or y1-y≥20.002.