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公开(公告)号：US20200097401A1
公开(公告)日：2020-03-26
申请号：US16425065
申请日：2019-05-29
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE
IPC: G06F12/02
Abstract: A memory system includes: a memory device including super memory blocks each having a plurality of memory blocks; a garbage collection operation time manager suitable for determining an operation time of a garbage collection operation according to a number of valid pages, distribution of the valid pages and distribution of logical addresses of the valid pages; and a garbage collection operation module suitable for controlling the memory device to perform the garbage collection operation within the determined operation time.
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公开(公告)号：US20200082891A1
公开(公告)日：2020-03-12
申请号：US16519936
申请日：2019-07-23
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE
Abstract: A memory system includes a memory device including a plurality of blocks, each capable of storing data, and a controller, coupled with the memory device. The controller can perform at least one sub erase operation on each of the plurality of blocks, and variably increase an erase count of each of the plurality of blocks based on a timing of erasing data of each of the plurality of blocks through the sub erase operation.
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公开(公告)号：US20200019496A1
公开(公告)日：2020-01-16
申请号：US16237121
申请日：2018-12-31
Applicant: SK hynix Inc.
Inventor： Hyeong-Ju NA , Jong-Min LEE
Abstract: A memory system includes: a memory device; a valid page counter for counting the number of valid pages of each closed block in the memory device before and after a map update operation; a maximum valid page decrease amount detector for detecting a maximum valid page decrease amount by calculating a valid page decrease amount for each closed memory block based on the number of the valid pages for the corresponding closed memory block, so as to calculate a total sum of valid page decrease amounts; and a garbage collector for performing a garbage collection operation on a victim block in the memory device, when the number of free blocks in the memory device is less than a first threshold value and greater than a second threshold value and a ratio of the maximal valid page decrease amount to the total sum of the valid page decrease amounts is a third threshold value or less.
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公开(公告)号：US20200019495A1
公开(公告)日：2020-01-16
申请号：US16225021
申请日：2018-12-19
Applicant: SK hynix Inc.
Inventor： Hyeong-Ju NA , Jong-Min LEE
Abstract: A memory system includes: a memory device including a closed memory block; an update block detector detecting a total sum of valid page decrease amounts and the number of update blocks based on the number of valid pages of the closed memory block that are counted before and after a map update operation; and a garbage collector performing a garbage collection operation on a victim block, based on the number of free blocks in the memory device, the counted number of the update blocks and the calculated total sum of the valid page decrease amounts.
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公开(公告)号：US20200012597A1
公开(公告)日：2020-01-09
申请号：US16228018
申请日：2018-12-20
Applicant: SK hynix Inc.
Inventor： Hyeong-Ju NA , Jong-Min LEE
Abstract: A memory system including: a memory device having an open block and a closed memory block; a page counting unit counting the number of program pages in the open block whenever a data is programmed in the open block, and counting the number of valid pages of the closed memory block; a valid page decrease amount counting unit calculating a total sum of valid pages decreased in the closed memory block before and after a map update operation; and a garbage collecting unit performing a garbage collection operation onto a victim block when the number of free blocks included in the memory device is less than a first threshold value and greater than a second threshold value, and a ratio of the number of the program pages in the open block to the total sum of the valid pages decreased is greater than or equal to a fourth threshold value.
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Patent Agency Ranking
公开(公告)号：US20190355425A1
公开(公告)日：2019-11-21
申请号：US16530552
申请日：2019-08-02
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE
IPC: G11C16/16 , G06F1/3225 , G11C16/08 , G11C16/30 , G06F12/02 , G11C11/4074
Abstract: A memory system includes: a nonvolatile memory device including a plurality of memory blocks; and a controller suitable for dividing the plurality of memory blocks into a first group and a second group, and controlling the memory blocks included the first group and the second group, respectively, wherein the controller is further suitable for: managing all operations except for an erase operation to the memory blocks of the first group through a first operation task; managing all operations except for an erase operation to the memory blocks of the second group through a second operation task; and managing the erase operation to the memory blocks of the first group and the memory blocks of the second group through an erase operation task.
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公开(公告)号：US20190220397A1
公开(公告)日：2019-07-18
申请号：US16038635
申请日：2018-07-18
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE
Abstract: A memory system includes a memory device including a plurality of memory blocks, and a controller suitable for measuring read counts of the memory blocks, calculating a global read count based on the measured read counts, and controlling the memory device to perform a read reclaim operation on a victim block when the global read count is equal to or higher than a threshold value.
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公开(公告)号：US20190196958A1
公开(公告)日：2019-06-27
申请号：US16040213
申请日：2018-07-19
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE
Abstract: A memory system includes a plurality of memory blocks, first and second queues, and a controller suitable for queuing first victim blocks whose error information value is equal to or greater than a threshold value among the memory blocks in the first queue, queuing second victim blocks whose read count is equal to or greater than a threshold value in the second queue, rearranging a priority order of the first and second victim blocks queued in the first and second queues based on read reclaim values, and performing a read reclaim operation on the first and second victim blocks based on the priority order.
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公开(公告)号：US20190107972A1
公开(公告)日：2019-04-11
申请号：US15993016
申请日：2018-05-30
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE
IPC: G06F3/06
Abstract: A memory system includes: a memory device that includes a plurality of memory blocks each of which includes a plurality of pages that store data; and a controller suitable for performing command operations corresponding to a plurality of commands received from a host on the plurality of memory blocks, applying pass voltages to a dummy region of the memory device when the command operations are performed, detecting first parameters for the plurality of memory blocks based on the applied pass voltages, and copying and storing data stored in first memory blocks in second memory blocks among the plurality of memory blocks based on the first parameters.
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公开(公告)号：US20180074710A1
公开(公告)日：2018-03-15
申请号：US15602320
申请日：2017-05-23
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE , Jee-Yul KIM
IPC: G06F3/06
CPC classification number: G06F3/064 , G06F3/0604 , G06F3/0679
Abstract: A memory system may include: a memory device including a plurality of pages in which data are stored and a plurality of memory blocks which include the pages; and a controller suitable for storing data segments of user data corresponding to a write command received from a host, in the pages included in the memory blocks, generating map segments of map data corresponding to storage of the data segments and lists, and searching and updating the map segments through the lists.
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