公开(公告)号：US20230038603A1

公开(公告)日：2023-02-09

申请号：US17810036

申请日：2022-06-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Juil Choi ,  Unbyoung Kang ,  Sechul Park ,  Hyojin Yun ,  Teahwa Jeong ,  Atsushi Fujisaki

IPC: H01L23/00 ,  H01L21/66

Abstract: A semiconductor package includes a semiconductor chip including a second bonding insulating layer surrounding at least a portion of each of a first bonding pad structure and a second bonding pad structure, in which the first bonding pad structure includes a first contact portion, a first bonding pad, and a first seed layer disposed between the first bonding pad and the first contact portion and extending in a first direction, the second bonding pad structure includes a second contact portion, a second bonding pad, and a second seed layer disposed between the second bonding pad and the second contact portion and extending in the first direction, and the second bonding insulating layer is in contact with a side surface of each of the first and second seed layers and the first and second bonding pads.

公开(公告)号：US20230011778A1

公开(公告)日：2023-01-12

申请号：US17652782

申请日：2022-02-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyoungjoo Lee ,  Unbyoung Kang ,  Sechul Park ,  Sangsick Park ,  Hyojin Yun ,  Teakhoon Lee ,  Juil Choi

IPC: H01L23/00 ,  H01L25/065

Abstract: A semiconductor package includes: a first semiconductor chip; a second semiconductor chip stacked on the first semiconductor chip; an underfill material layer interposed between the first semiconductor chip and the second semiconductor chip; and a first dam structure disposed on the first semiconductor chip. The first dam structure extends along an edge of the second semiconductor chip and includes unit dam structures apart from each other with a slit therebetween. A vertical level of an upper surface of the first dam structure is located between a vertical level of a lower surface of the second semiconductor chip and a vertical level of an upper surface of the second semiconductor chip. A first sidewall of the first dam structure is in contact with the underfill material layer and includes a flat surface parallel to a sidewall of the second semiconductor chip that faces the first sidewall of the first dam structure.

公开(公告)号：US11469180B2

公开(公告)日：2022-10-11

申请号：US16886444

申请日：2020-05-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junyeong Heo ,  Unbyoung Kang ,  Donghoon Won

IPC: H01L23/528 ,  H01L23/58 ,  H01L23/48 ,  H01L21/78 ,  H01L21/3065

Abstract: A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposing each other, and a side surface between the first and second surfaces, and including a device region on the first surface a wiring structure on the surface of the semiconductor substrate, and having a dielectric layer and a metal wiring in the dielectric layer and electrically connected to the device region, and an insulating material layer on a side surface of the wiring structure and having a side surface connected to the side surface of the semiconductor substrate. The side surface of the insulating material layer has a first wave-shaped pattern in which concave-convex portions are repeated in a direction of the wiring structure that is perpendicular to the semiconductor substrate, and the side surface of the semiconductor substrate has a second wave-shaped pattern in which concave-convex portions are repeated in the direction.