公开(公告)号：US20090161648A1

公开(公告)日：2009-06-25

申请号：US12194516

申请日：2008-08-19

Applicant: Deepak MATHEW ,  Russ MESTECHKIN ,  Prahallada PONNATHOTA ,  Thomas F. HOWE ,  Timothy Perrin FISHER-JEFFES

Inventor： Deepak MATHEW ,  Russ MESTECHKIN ,  Prahallada PONNATHOTA ,  Thomas F. HOWE ,  Timothy Perrin FISHER-JEFFES

IPC: H04W74/02

CPC classification number: H04B1/707 ,  G06F5/16 ,  G11C7/1075 ,  H04B2201/70707

Abstract: A wireless device has a BRP-CRP interface that includes a dual-port frame memory having a first access port and a second access port in which data can be written to the dual-port frame memory through the first access port at the same time that data is read from the dual-port frame memory through the second access port. A bit rate processor performs bit rate processing on input data and writes data resulting from the bit rate processing to the dual-port frame memory through the first access port. A chip rate processor reads data from the dual-port frame memory through the second access port and performs chip rate processing on the data read from the dual-port frame memory. A data processor executes a software application that writes data to the dual-port frame memory through the first access port and reads data from the dual-port frame memory through the second access port.

Abstract translation: 无线设备具有BRP-CRP接口，其包括具有第一接入端口和第二接入端口的双端口帧存储器，其中可以通过第一接入端口将数据写入双端口帧存储器，同时该 通过第二个访问端口从双端口帧存储器中读取数据。 比特率处理器对输入数据执行比特率处理，并将通过比特率处理产生的数据通过第一接入端口写入双端口帧存储器。 芯片速率处理器通过第二访问端口从双端口帧存储器读取数据，并对从双端口帧存储器读取的数据执行码片速率处理。 数据处理器执行通过第一访问端口将数据写入双端口帧存储器的软件应用程序，并通过第二访问端口从双端口帧存储器读取数据。

公开(公告)号：US07535864B2

公开(公告)日：2009-05-19

申请号：US11372152

申请日：2006-03-10

Applicant: Yoshitaka Aramaki

Inventor： Yoshitaka Aramaki

IPC: H04B7/216

CPC classification number: H04B1/7093 ,  H04B1/707 ,  H04B1/70735 ,  H04B1/7077 ,  H04B1/7083 ,  H04B2201/70701 ,  H04B2201/70707 ,  H04J13/00

Abstract: A CDMA radio receiving apparatus which receives a slot which has a long code group identification short code at a point where a long code is masked. The apparatus includes a detector that detects a phase of the long code in association with a pattern that appears over successive slots and comprises the long code group identification short code. The apparatus also includes a correlator that performs correlation processing in association with the phase detected by the detector to identify the long code.

Abstract translation: CDMA无线电接收装置，其在长码被屏蔽的点处接收具有长码组识别短码的时隙。 该装置包括检测器，其与在连续时隙上显示的图案相关联地检测长码的相位，并且包括长码组识别短码。 该装置还包括相关器，其执行与由检测器检测到的相位相关联的相关处理以识别长码。

公开(公告)号：US20090041163A1

公开(公告)日：2009-02-12

申请号：US12065508

申请日：2006-08-31

Applicant: Elias Jonsson ,  Marten Myrehed

Inventor： Elias Jonsson ,  Marten Myrehed

IPC: H04L27/06

CPC classification number: H04B1/7113 ,  H04B1/7117 ,  H04B2201/70702 ,  H04B2201/70707 ,  H04B2201/709727

Abstract: Multipath components of transmitted data symbols are received with individual delays and processed by a RAKE having a number of fingers. A delay profile indicating magnitudes for a first number of delay values is provided. Estimated magnitudes for a second number of delay values located between the first number of delay values are calculated by interpolation, and a combined delay profile is provided by combining the magnitudes for the first and second number of delay values. Delay values for peaks in the combined delay profile are determined, and a number of peak delay values (P1, P2, P) comprising the largest peak are selected from the combined delay profile. At least some of the selected peak delay values are provided to the RAKE and assigned to the fingers. This allows a reduction of current consumption and dye area, while still providing delay values with sufficient resolution for the RAKE.

Abstract translation: 所传输的数据符号的多路径分量被接收具有单独的延迟并由具有多个指状物的RAKE处理。 提供了指示第一数量的延迟值的幅度的延迟分布。 通过内插计算位于第一数量的延迟值之间的第二数量的延迟值的估计幅度，并且通过组合第一和第二数量的延迟值的幅度来提供组合的延迟分布。 确定组合延迟分布中的峰值的延迟值，并从组合的延迟分布中选择包括最大峰值的峰值延迟值（P1，P2，P）的数目。 所选择的峰值延迟值中的至少一些被提供给RAKE并被分配给手指。 这允许减少电流消耗和染色面积，同时仍然为RAKE提供足够的分辨率的延迟值。

公开(公告)号：US20090031190A1

公开(公告)日：2009-01-29

申请号：US11993916

申请日：2006-06-29

Applicant: Michihiro Oosuge

Inventor： Michihiro Oosuge

IPC: H03M13/05 ,  G06F11/10

CPC classification number: H04W52/20 ,  H03M13/09 ,  H03M13/2975 ,  H03M13/3707 ,  H04B2201/70707 ,  H04L1/0051 ,  H04L1/0061 ,  H04L1/0066 ,  H04L1/203 ,  H04W52/12 ,  H04W52/143 ,  H04W52/241

Abstract: There are provided a turbo decoding system of a CDMA mobile communication terminal, a transmission power control method, and a CDMA mobile communication terminal in which interference in the other users is suppressed by not increasing the transmission power of a base station to a value over the necessary value and excessive repetitive processing is prevented in the turbo decoding section to reduce consumption power.There are disposed a BLER measuring section 10 to measure BLER as reception quality for each number of decoding bits on the basis of a CRC judge result after an error correction by the turbo decoding section 4 and an outer loop power control and iteration control section 11 to control transmission power of a base station and to control the iteration count of turbo decoding on the basis of the reception quality of each number of decoding bits. The outer loop power control and iteration control section 11 controls the transmission power of the base station by producing a target SIR according to the reception signal such that SIR of the reception signal is the target SIR and adaptively controls to make the iteration count optimal on the basis of the convergence state of the outer loop transmission power control.

Abstract translation: 提供了CDMA移动通信终端的turbo解码系统，发送功率控制方法和CDMA移动通信终端，其中通过不将基站的发送功率提高到超过该值的值来抑制其他用户的干扰 在turbo解码部分中防止必要的值和过度的重复处理以降低消耗功率。 设置BLER测量部分10，用于根据turbo解码部分4的纠错后的CRC判断结果和外部环路功率控制和迭代控制部分11，将BLER作为每个解码比特数的接收质量来测量， 控制基站的发送功率，并且基于每个解码比特的接收质量来控制turbo解码的迭代计数。 外环功率控制和迭代控制部分11通过根据接收信号产生目标SIR来控制基站的发射功率，使得接收信号的SIR是目标SIR，并且自适应地控制以使迭代计数在 外环传输功率控制收敛状态的基础。

公开(公告)号：US07483475B2

公开(公告)日：2009-01-27

申请号：US11926534

申请日：2007-10-29

Applicant: Jaeyoung Kwak ,  John W. Haim ,  Ariela Zeira ,  Jung-Lin Pan

Inventor： Jaeyoung Kwak ,  John W. Haim ,  Ariela Zeira ,  Jung-Lin Pan

IPC: H04B1/00

CPC classification number: H04B1/71052 ,  H04B2201/70707

Abstract: K data signals, or bursts, are transmitted over a shared spectrum in a code division multiple access communication format. A combined signal is received and sampled over the shared spectrum, as a plurality of received vector versions. The combined signal includes the K transmitted data signals. A plurality of system matrices and an associated covariance matrix using codes and estimated impulse responses of the K data signals is produced. Each system matrix corresponds to a received vector version. The system and covariance matrices are extended and approximated as block circulant matrices. A diagonal matrix of each of the; extended and approximated system and covariance matrices are determined by prime factor algorithm—fast Fourier transform (PFA-FFT) without division of the matrix. The received vector versions are extended. A product of the diagonal matrices and the extended received vector versions is taken. An inverse block discrete Fourier transform is performed by a PFA-FFT on a result of the product to produce the estimated data of the K data signals.

Abstract translation: K个数据信号或脉冲串以码分多址通信格式通过共享频谱发送。 组合信号在共享频谱上被接收和采样，作为多个接收的矢量版本。 组合信号包括K个发送的数据信号。 产生多个系统矩阵和使用K个数据信号的代码和估计的脉冲响应的相关协方差矩阵。 每个系统矩阵对应于接收到的矢量版本。 系统和协方差矩阵被扩展和近似为块循环矩阵。 每个的对角矩阵; 扩展和近似系统和协方差矩阵通过素数因子算法 - 快速傅里叶变换（PFA-FFT）来确定，而不分割矩阵。 收到的矢量版本被扩展。 采用对角矩阵和扩展接收向量版本的乘积。 通过PFA-FFT对乘积的结果执行逆块离散傅里叶变换，以产生K个数据信号的估计数据。

公开(公告)号：US20090010431A1

公开(公告)日：2009-01-08

申请号：US11547220

申请日：2005-03-10

Applicant: Maarten De Vries ,  Samir Dechicha

Inventor： Maarten De Vries ,  Samir Dechicha

IPC: H04L9/00 ,  H04L9/28 ,  G06F17/16

CPC classification number: H04B1/70756 ,  H04B2201/70707

Abstract: The disclosure relates to a method of synchronising a device for receiving scrambled data, using at least one periodic scrambling sequence which is divided into K time intervals, each interval comprising N bit periods known as symbols. In particular, one such method includes calculating a synchronisation value of at least one polynomial that generates the aforementioned scrambling sequence within a pre-determined synchronisation time interval and synchronisation bit period. During the calculation step, the sequence is progressed through at increments of at least one time interval and at least one bit period, using a matrix calculation of the synchronisation value.

Abstract translation: 本公开涉及一种使用至少一个周期性加扰序列来同步用于接收加扰数据的装置的方法，所述周期性加扰序列被划分为K个时间间隔，每个间隔包括被称为符号的N个比特周期。 特别地，一种这样的方法包括在预定的同步时间间隔和同步位周期内计算生成上述加扰序列的至少一个多项式的同步值。 在计算步骤期间，使用同步值的矩阵计算，以至少一个时间间隔和至少一个比特周期的增量进行序列。

公开(公告)号：US07474260B2

公开(公告)日：2009-01-06

申请号：US11406644

申请日：2006-04-19

Applicant: Chun-nan Chen

Inventor： Chun-nan Chen

IPC: G01S5/14 ,  H04B1/00

CPC classification number: G01S19/34 ,  G01S19/24 ,  G01S19/29 ,  G01S19/30 ,  G01S19/37 ,  H04B1/7075 ,  H04B2001/70706 ,  H04B2201/70707

Abstract: A satellite signal adjustable time-division multiplexing receiver for GNSS and a method for acquiring and tracking satellite signal used in the receiver. The present invention executes correlation in an adjustable time-division multiplexing and uses a clock signal with a clock rate to control speed of correlation. The clock rate can be fixed or variable. In the case that the clock rate is variable, when the speed is required to be fast (e.g. in satellite acquisition mode), the clock rate is set to be high clock rate; when the speed needs not be so fast (e.g. in signal tracking mode), the clock rate can be lower down to reduce power consumption. The adjustable time-division multiplexing is arranged for respective domains such as visible satellite, code phase, Doppler frequency and tracking accuracy according to the clock rate.

Abstract translation: 用于GNSS的卫星信号可调时分多路复用接收机以及用于获取和跟踪在接收机中使用的卫星信号的方法。 本发明在可调时分复用中执行相关性，并且使用具有时钟速率的时钟信号来控制相关速度。 时钟频率可以是固定的或可变的。 在时钟速率可变的情况下，当速度要求快时（例如在卫星采集模式中），时钟频率被设置为高时钟频率; 当速度不需要如此快速（例如在信号跟踪模式中）时，可以将时钟速率降低以降低功耗。 根据时钟频率，对可视卫星，码相位，多普勒频率和跟踪精度等各个域进行可调时分复用。

公开(公告)号：US20080317103A1

公开(公告)日：2008-12-25

申请号：US12185878

申请日：2008-08-05

Applicant: Parthapratim De ,  Ariela Zeira ,  Jung-Lin Pan ,  Raj Mani Misra

Inventor： Parthapratim De ,  Ariela Zeira ,  Jung-Lin Pan ,  Raj Mani Misra

IPC: H04B1/707

CPC classification number: H04B1/7105 ,  H04B1/71052 ,  H04B2201/70707 ,  H04L25/0212

Abstract: A transmitter site transmits a plurality of different data signals at a chip rate over a shared spectrum in a code division multiple access communication system. Each transmitted data signal experiences a similar channel response. A combined signal of the transmitted data signals is received. The combined signal is sampled at a multiple of the chip rate. The channel response for the combined signal is determined. A spread data vector is determined using the combined signal samples and the estimated channel response. The data of the different data signals is determined using the spread data vector.

Abstract translation: 发射机站在码分多址通信系统中通过共享频谱以码片速率发送多个不同的数据信号。 每个发送的数据信号经历类似的信道响应。 接收发送的数据信号的组合信号。 组合信号以芯片速率的倍数进行采样。 确定组合信号的信道响应。 使用组合的信号样本和估计的信道响应来确定扩展数据向量。 使用扩展数据向量来确定不同数据信号的数据。

公开(公告)号：US07450492B2

公开(公告)日：2008-11-11

申请号：US10463546

申请日：2003-06-18

Applicant: Koji Yotsumoto ,  Shunji Abe

Inventor： Koji Yotsumoto ,  Shunji Abe

IPC: H04J11/00

CPC classification number: H04B1/7075 ,  H04B1/7113 ,  H04B2201/70707

Abstract: A correlation detection apparatus which realizes software CDMA inverse-spread processing. A reception circuit receives an RACH preamble from a mobile station, and an A/D converts the preamble into digital received data. An FFT unit FFT-processes the received data to obtain an FFT result. An RACH code storage unit holds an RACH preamble code, and another FFT unit FFT-processes the RACH preamble code to obtain another FFT result. A multiplication unit multiples the FFT result by the other FFT result. An IFFT unit IFFT-processes a result of multiplication input from the multiplication unit to obtain a delay profile. A data decoding unit decodes the received data by using the delay profile, and obtains decoded data.

Abstract translation: 实现软件CDMA反扩展处理的相关检测装置。 接收电路从移动台接收RACH前导码，并且A / D将前同步码转换为数字接收数据。 FFT单元FFT处理接收到的数据以获得FFT结果。 RACH码存储单元保存RACH前导码，另一FFT单元对RACH前导码进行FFT处理以获得另一FFT结果。 乘法单元将FFT结果乘以另一FFT结果。 IFFT单元IFFT处理来自乘法单元的乘法输入的结果以获得延迟分布。 数据解码单元通过使用延迟分布对接收到的数据进行解码，并获得解码数据。

公开(公告)号：US20080243982A1

公开(公告)日：2008-10-02

申请号：US11731174

申请日：2007-03-30

Applicant: Eliahou Arviv ,  Robert L. Lang ,  Yi-Chen Li ,  Oliver Ridler ,  Xiao-an Wang

Inventor： Eliahou Arviv ,  Robert L. Lang ,  Yi-Chen Li ,  Oliver Ridler ,  Xiao-an Wang

IPC: G06F17/10 ,  G06F7/32

CPC classification number: G06F17/16 ,  H04B1/707 ,  H04B2201/70707 ,  H04B2201/709727

Abstract: In one embodiment, a receiver including one or more signal-processing blocks and a hardware-based matrix co-processor. The one or more signal-processing blocks are adapted to generate a processed signal from a received signal. The hardware-based matrix co-processor includes two or more different matrix-computation engines, each adapted to perform a different matrix computation, and one or more shared hardware-computation units, each adapted to perform a mathematical operation. At least one signal-processing block is adapted to offload matrix-based signal processing to the hardware-based matrix co-processor. Each of the two or more different matrix-computation engines is adapted to offload the same type of mathematical processing to at least one of the one or more shared hardware-computation units.

Abstract translation: 在一个实施例中，接收机包括一个或多个信号处理块和基于硬件的矩阵协处理器。 所述一个或多个信号处理块适于从接收到的信号产生经处理的信号。 基于硬件的矩阵协处理器包括两个或更多个不同的矩阵计算引擎，每个矩阵计算引擎适于执行不同的矩阵计算，以及一个或多个共享硬件计算单元，每个共享硬件计算单元适于执行数学运算。 至少一个信号处理块适于将基于矩阵的信号处理卸载到基于硬件的矩阵协处理器。 两个或更多个不同的矩阵计算引擎中的每一个适于将相同类型的数学处理卸载到一个或多个共享硬件计算单元中的至少一个。