Abstract:
A method for coding a message of a plurality of m-state symbols into a coded message of n-state symbols wherein n>m is disclosed. A method to make the distribution of states of n-state symbols a uniform distribution is also disclosed. A coding rule is initiated based on a distribution of states of m-state symbols. A method of coding the coding rule by transposition is also provided. In one embodiment a coded message of n-state symbols has symbols that each have a unique state. A system for executing the coding and decoding methods is also disclosed.
Abstract:
Methods and apparatus to create and display panoramic images on a mobile device are disclosed. Such a mobile device can be a mobile phone. Apparatus is provided to control the position of a lens in relation to a reference lens. Methods and apparatus are provided to generate multiple images that are combined into a panoramic image. A panoramic image may be a static image. It may also be a video image. A controller provides correct camera settings for different conditions. An image processor creates a panoramic image from the correct settings provided by the controller. A panoramic camera is applied in a computer gaming system.
Abstract:
An n-valued switch with n≧2, with an input enabled to receive a signal in one of n states, an output enabled to provide a signal in one of at least 2 states, under control of a control signal having one of at least 2 states is disclosed. Signals are instances of a physical phenomenon, an instance representing a state. N-valued inverters are also disclosed. Different types of signals are disclosed, including optical signals with different wavelengths, electrical signals with different frequencies and signals represented by a presence of a material. A kit including an n-valued switch is also disclosed.
Abstract:
A method for coding a message of a plurality of m-state symbols into a coded message of n-state symbols wherein n>m is disclosed. A method to make the distribution of states of n-state symbols a uniform distribution is also disclosed. A coding rule is initiated based on a distribution of states of m-state symbols. A method of coding the coding rule by transposition is also provided. In one embodiment a coded message of n-state symbols has symbols that each have a unique state. A system for executing the coding and decoding methods is also disclosed.
Abstract:
Method and apparatus for generating ternary and multi-valued Gold sequences, are disclosed. Also methods to detect ternary and multi-valued sequences are disclosed. The detection can be performed by a ternary or multi-valued LFSR descrambler when the sequences are generated by an LFSR based sequence generator. A wireless system which can assign additional sequences to designated users is also disclosed. The wireless system can also transfer information to user equipment that enables methods for sequence generation and sequence detection.
Abstract:
Ternary (3-value) and higher, multi-value digital scramblers/descramblers in digital communications. The method and apparatus of the present invention includes the creation of ternary (3-value) and higher value truth tables that establish ternary and higher value scrambling functions which are its own descrambling functions. The invention directly codes by scrambling ternary and higher-value digital signals and directly decodes by descrambling with the same function. A disclosed application of the invention is the creation of composite ternary and higher-value scrambling devices and methods consisting of single scrambling devices or functions combined with ternary or higher value shift registers. Another disclosed application is the creation of ternary and higher-value spread spectrum digital signals. Another disclosed application is a composite ternary or higher value scrambling system, comprising an odd number of scrambling functions and the ability to be its own descrambler.
Abstract:
Multi-valued or n-state with n=2p Linear Feedback Shift Registers (LFSRs) in binary form are provided for scramblers, descramblers and sequence generators using addition and multiplication functions over a Finite Field GF(n) in binary form. N-state switching functions in an LFSR are implemented by using implementations of reversible binary functions. LFSRs may be in Fibonacci or in Galois configuration. N-state LFSR based sequence generators in binary form for generating an n-state maximum length sequence in binary form are also provided. A method for simple correlation calculation is provided. Communication systems and data storage systems using the LFSRs are also disclosed.
Abstract:
A switching model to create stable binary sequential devices comprised of one or more logic functions with feedback of which an output signal is uniquely related to an input signal is applied to possible binary logic functions. Static latches of commutative and non-commutative binary functions are designed by using the switching model. Latches can be realized by individually controlled gates sometimes with inverters. Optical and electro-optical latches are disclosed. The application of transmission gates to realize latches is also disclosed.
Abstract:
Methods and apparatus for coding binary and multi-value sequences into higher value sequences are disclosed. Correlation methods for comparing lower-value sequences by first coding to higher value sequences and then calculating a correlation number are also disclosed. Methods and apparatus for resetting the coding rule during multi-value coding are also disclosed.
Abstract:
Methods and apparatus reducing the number of multipliers in Galois Field arithmetic are disclosed. Methods and apparatus for implementing n-valued Linear Feedback Shift Register (LFSR) based applications with a reduced number of multipliers are also disclosed. N-valued LFSRs with reduced numbers of multipliers in Fibonacci and in Galois configuration are demonstrated. Multiplier reduction methods are extended to n-valued functions with more than 2 inputs. Methods to create multiplier reduced multi-input n-valued function truth tables are disclosed. Methods and apparatus to implement these truth tables with a limited number of n-valued inverters are also disclosed. Scrambler/descrambler combinations with adders and multipliers over GF(2p) are provided. Communication, data storage and digital rights management systems using multiplier reduction methods and apparatus or the disclosed scrambler/descrambler combination are also provided.