Abstract:
A liquid crystal display (LCD) ensuring excellent display quality and reducing power consumption is disclosed. The liquid crystal display (LCD) includes first and second polarity image display pixels, such that a polarity inversion of data is executed by line, column, and dot, and the polarity inversion of a common voltage is executed by frame. An inversion driving method using the liquid crystal display (LCD) is also disclosed.
Abstract:
Provided is a method of operating a magnetic random access memory device comprising a switch structure and a magnetoresistance structure. According to the method, current variation depending on the direction of the current can be reduced by controlling a gate voltage of the switch structure when supplying current to write data to the magnetoresistance structure.
Abstract:
A method is provided for displaying a message in a mobile communication terminal. According to one example, the method includes the steps of receiving a first message, displaying the first message on a first display of the terminal, and displaying a message preparation window on a second display of the terminal simultaneously with the display of the first message. Since the terminal user can prepare a response text message to a received text message while viewing the received text message, the preparation of the response text message can be more conveniently achieved.
Abstract:
Memory devices include a semiconductor substrate and a plurality of wordlines on the semiconductor substrate. A ground select line is on the semiconductor substrate on a first side of the wordlines and a string select line is on the semiconductor substrate on a second side of the wordlines. The wordlines extend between the ground select line and the string select line. First spacers are disposed between the wordlines, between the ground select line and an adjacent one of the wordlines and between the string select line and an adjacent one of the wordlines. Second spacers are disposed on sidewalls of the ground select line and the string select line displaced from the first spacers. The second spacers are a different material than the first spacers. The memory devices may be nonvolatile memory devices. Methods are also provided for forming the memory devices.
Abstract:
The present invention provides a 2 stage rotary compressor (100) including a hermetic container (101), a 2 stage compression assembly provided in the hermetic container, wherein a low pressure compression assembly (120), a middle plate (130) and a high pressure compression assembly (140) are successively stacked from any one of upper and lower portions, a first discharge port (124) for discharging middle pressure refrigerant compressed in the low pressure compression assembly (120) a second discharge port (162p) for discharging high pressure refrigerant compressed in the high pressure compression assembly (130) and a third discharge port (172p) positioned at any one of the upper and lower portions of the 2 stage compression assembly to discharge high pressure refrigerant compressed in the 2 stage compression assembly to the hermetic container (101), wherein an area of the third discharge port (172p) is larger than 0.5 times of an area of the first discharge port and smaller than 1.0 times thereof. As a volume flow of refrigerant compressed in the low pressure compression assembly (120) determines a volume flow of refrigerant compressed in the entire 2 stage compression assembly, a size of the third discharge port discharging refrigerant compressed in the 2 stage compression assembly is preferably optimized at a ratio with respect to a size of the first discharge port (127). Therefore, the size of the third discharge port (172p) can be optimized to suppress noise of the compressor.
Abstract:
A method of manufacturing a non-volatile memory device providing a semiconductor layer in which a cell region and a peripheral region are defined, sequentially forming a first insulating layer, a first conductive layer, a second insulating layer, and a second conductive layer on the cell region and the peripheral region, forming a trench for exposing a portion of the first conductive layer of the peripheral region, wherein the trench is formed by removing portions of the second conductive layer and the second insulating layer in the peripheral region, performing a trimming operation for removing portions of the second conductive layer and the second insulating layer of the cell region, forming a spacer on a side surface of the trench, and forming a silicide layer that is electrically connected to the first conductive layer, wherein the silicide layer is formed by performing a silicidation process on the spacer.
Abstract:
A vertical-type semiconductor device includes a semiconductor substrate having a cell region and a peripheral circuit region, a wordline structure on the cell region of the semiconductor substrate, the wordline structure including a plurality of wordlines stacked on top of each other, a semiconductor structure through the wordline structure, a gate dielectric between the wordline structure and the semiconductor structure, and a dummy wordline structure on the peripheral circuit region, the dummy wordline structure having a vertical structure and including same components as the wordline structure.
Abstract:
In a NAND type nonvolatile memory device, a first insulating layer covers a common drain region formed in a string active region and a peripheral active region. A second insulating layer covers the first insulating layer. A bit line plug penetrates the first and second insulating layers and is connected to the common drain region. A peripheral lower plug penetrates the first insulating layer and is connected to the peripheral active region. A peripheral upper plug penetrates the second insulating layer and is stacked on the peripheral lower plug.
Abstract:
Provided are a semiconductor memory device and a method of programming the same. The semiconductor memory device includes a mode input value generating unit and a logic operating unit. The mode input value generating unit changes a connection state between input values of a current driving circuit so as to correspond to each of at least two operating modes, and defines a logic function of a magnetic memory cell connected to the current driving circuit in response to each operating mode. The logic operating unit performs a logic operation on the logic functions of at least two magnetic memory cells defined according to each of the operating modes and generates a result of logic operation.
Abstract:
A fixing unit which enables high-speed operation and miniaturization, and an image forming apparatus having the fixing unit, includes a heating member which is heated by a heat source, the heating member having a predetermined width; a rotating member to rotate in contact with the heating member; a driving member to rotate the rotating member; and a pressing member to press both sides of the heating member towards the driving member and to form a predetermined fixing nip between the rotating member and the driving member, wherein the heating member has a second moment of inertia which is set to maintain a fixing efficiency of 90% or more in a central portion of the heating member.